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56 Commits

Author SHA1 Message Date
billow 0fdff8dc33 Fix disassemble of `xor` 
- update generate file using 78180b63f8
 2023-05-18 07:29:02 +08:00
billow 114f1ad867 Upper all `inc` and fix 2023-05-01 22:52:47 +08:00
billow a4118c4ec9 update TriCoreGenAsmWriter.inc 2023-04-14 00:36:16 +08:00
billow 230ff6db56 fix tests 2023-04-14 00:36:08 +08:00
billow c78a086a55 fix `TRICORE_GENERIC` inst 2023-04-14 00:36:07 +08:00
billow 2a7684d272 fix tests 2023-04-14 00:36:05 +08:00
billow e843a8df56 fix tests 2023-04-14 00:36:04 +08:00
billow dd04f4d98b Update TriCore instructions in TriCoreInstrInfo.td 2023-04-14 00:36:04 +08:00
billow 014c73de2e add tests 2023-04-14 00:36:03 +08:00
billow 303fa9a7d8 fix tc1.6.2 tests 2023-04-14 00:36:01 +08:00
billow 68e448d500 fix tc1.1 tests 2023-04-14 00:36:00 +08:00
billow 4e75d75e91 fix 2023-04-14 00:35:59 +08:00
billow 67ec2089f1 fix 2023-04-14 00:35:58 +08:00
billow 54a579f06d fix 2023-04-14 00:35:57 +08:00
billow cf921632cf fix tc110 test and fix decode 2023-04-14 00:35:55 +08:00
billow 3bc09883bd fix `CADD` `CSUB` 2023-04-14 00:35:54 +08:00
billow f3f62b05dc add tc110 tests and fix tricore decode 2023-04-14 00:35:54 +08:00
billow d1404e8e79 fix tricore tests 2023-04-14 00:35:52 +08:00
billow d31b9cf0b9 fix TriCoreDisassembler.c from tests 2023-04-14 00:35:51 +08:00
billow 8e19b13abd fix 2023-04-14 00:35:49 +08:00
billow 5ebe09366b fix 2023-04-14 00:35:46 +08:00
billow 07d3238d9f Add support for TriCore V162 and new instructions/operands. 
- Add new instruction `MOVZ_A`, remove instruction `NOT`, and add several new multiply and multiply-subtract instructions
- Move `multiclass mISR_1` and `multiclass mISYS_0` to separate file and fix typo in `rfe` instruction in `mISYS_0`
- Add support for new CPU feature `TriCore_FEATURE_HasV162` and update relevant inc files.
 2023-04-14 00:35:42 +08:00
billow 6fe3766434 refactor: Refactor TriCore instruction definitions and mappings 
- Add new `multiclass mI_MADDRsh_` to handle `MADDR_H` and `MADDRS_H` in `arch/TriCore/TriCoreInstrInfo.td`
 2023-04-14 00:35:36 +08:00
billow d41decd0f0 feat: Add and remove TriCore instructions. 
- Add 3 new TriCore instructions
- Remove TriCore instruction "TriCore_INS_INIT"
- Alphabetized and rearranged various TriCore instructions
- Commented out code remains in the diff but is not part of the program.
 2023-04-14 00:35:34 +08:00
billow a076fdeb0a refactor: Refactor TriCore instruction decoding and register definition. 
- Update TriCore processor register definitions with auto-generated file `TriCoreGenCSRegEnum.inc`
- Add several new TriCore processor instructions with auto-generated file `TriCoreGenCSInsnEnum.inc`
- Update TriCore_OP_GROUP enumeration with auto-generated file `TriCoreGenCSOpGroup.inc`
- Rename and restructure TriCore processor register classes
- Remove unused register class definitions and related code
 2023-04-14 00:35:32 +08:00
billow 4567335c20 add some tricore v1.1 inst 2023-04-14 00:35:27 +08:00
billow 878e09db04 fix: decode `j` `call` `loop` 2023-04-14 00:35:22 +08:00
billow d9e715bc17 feat: Fix bugs and update instructions for TriCore architecture. 
- Fix bug in `printDisp8Imm` function in `TriCoreInstPrinter.c`
- Add new `CALL_sb` instruction to `TriCoreInstrInfo.td`
- Reorder instruction definitions and operands in `TriCoreInstrInfo.td`
 2023-04-14 00:35:21 +08:00
billow fae62b74bf refactor: Refactor TriCore instructions and operands 
- Add new immediate operands and refactor code for better readability in TriCoreInstrInfo
- Update InstPrinter functions to handle new immediate operands and remove unused function
 2023-04-14 00:35:20 +08:00
billow 5b7e20ad55 fix: TriCore Instruction Formats and Printing 
- Add new operand type `off18imm`
- Add `printOff18Imm` function for printing specific immediate value
 2023-04-14 00:35:19 +08:00
billow 7e937d10ad Fix: TriCore instruction operations and decoding. 2023-04-14 00:35:18 +08:00
billow 9bdd734d0e fix: TriCore instruction decoding and printing. 
- Modify TriCore instructions to use bracket syntax and offsets for better clarity
- Add off4_fixup and printSExtImm_n
 2023-04-14 00:35:17 +08:00
billow a78a46a397 fix: TriCore architecture disassembly codes 
- Rename `ISLR_post_increment` to `ISLR_pos` for clarity
- Fix register decoding for TriCore architecture in `TriCoreDisassembler.c`
- Add new file `LoadStore.s.cs` to `suite/MC/TriCore`
 2023-04-14 00:35:16 +08:00
billow f19a93ad43 add `BO` 2023-04-14 00:35:14 +08:00
billow 6381b0750e add `MTCR` 2023-04-14 00:35:13 +08:00
billow 1c190c49cc Whether to call `a10` a `sp` 2023-04-14 00:35:12 +08:00
billow 63db2dc804 fix `mov.a` `mov.d` 2023-04-14 00:35:10 +08:00
billow 927e075500 fix 2023-04-14 00:35:09 +08:00
billow fec75ae36a fix `RR` 2023-04-14 00:35:09 +08:00
billow 85d2936f87 fix `INSERT_rrpw` 2023-04-14 00:35:08 +08:00
billow fd8a2b8dc9 fix `BO` `BOL` 2023-04-14 00:35:04 +08:00
billow 98f0eb61a8 fix 2023-04-14 00:35:01 +08:00
billow cffcfdbb4c fix 2023-04-14 00:34:58 +08:00
billow 564f962146 fix 2023-04-14 00:34:57 +08:00
billow b1f7cfeb84 fix build 2023-04-14 00:34:52 +08:00
billow 33080bb326 update `TriCore*.inc` 2023-04-14 00:34:51 +08:00
Sidney Pontes Filho 81b1df7f91 Transfer modifications of TriDis/llvm-tricore on Feb, 04 2017 2023-04-14 00:34:25 +08:00
Sidney Pontes Filho 651aa5a1f1 Fix memory access printing and clean unused functions 2023-04-14 00:34:21 +08:00
Sidney Pontes Filho 4aace70036 Transfer modifications of TriDis/llvm-tricore on Oct 05, 2016 2023-04-14 00:34:20 +08:00
Sidney Pontes Filho 4bc36ec68b Transfer modifications of TriDis/llvm-tricore on Sep 20, 2016 2023-04-14 00:34:19 +08:00