d7e42b7d36
rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly
2014-09-29 17:15:25 +08:00
aa58f7fca5
typo fix for capstone.h
2014-09-25 16:56:31 +08:00
acbafc6d75
ocaml/python/java: fix some broken arm64 constants generated by const_generator.py
2014-09-25 12:46:17 +08:00
54f8cef449
mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings
2014-09-24 22:53:54 +08:00
5691dd4637
mips: fixed & added new instructions. also updated Ocaml/Python/Java bindings
2014-09-24 18:03:47 +08:00
7e57e79800
ppc: handle branch condition for alias instructions. this also updates Python & Java bindings
2014-09-21 13:04:50 +08:00
1738a3e6bf
sparc: handle some alias instructions & more details for some special instructions. update Python & Java bindings accordingly with new instructions & registers
2014-09-17 00:01:04 +08:00
eaecfa4925
ppc: add PPC_INS_BNE for alias instruction BNE
2014-09-16 23:13:14 +08:00
2c425fcbe2
correct an incorrect comment on default value of skipdata mnem: .db -> .byte. bug reported by Ben Nagy
2014-09-07 09:46:54 +08:00
721d07f6b2
ppc: support alias instructions. update Python & Java bindings accordingly
2014-09-04 12:03:31 +08:00
04d9f8ee17
arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes
2014-09-01 23:27:24 +08:00
4f0d7048cd
arm64: vector_index = 0 is valid. this changed invalid value of vector_index to -1
2014-08-29 15:11:23 +08:00
0beb0d494b
api: get back the old API cs_disasm() & mark cs_disasm_ex() deprecated. cs_disasm_ex() will be removed in the future
2014-08-27 22:55:29 +08:00
934e180e54
x86: more update to the core
2014-08-27 21:59:25 +08:00
a7792ae488
systemz: update core. also update Python & Java bindings
2014-08-26 12:14:25 +08:00
c286b346c6
Merge branch 'arm64' into v3
2014-08-25 17:01:53 +08:00
0efef5dd48
solve some conflicts when merging -next into -v3
2014-08-25 17:01:45 +08:00
46a74e53b7
arm64: update core. this added a lot more details to cs_arm64_op struct
2014-08-25 16:47:12 +08:00
78c4876390
Merge branch 'cs_insn_const' of https://github.com/obs1dium/capstone into next
2014-08-21 08:44:28 +08:00
876b6b6a33
use const when passing cs_insn pointers
2014-08-21 00:57:04 +02:00
663829431e
x86: return proper error if cs_option() enables AT&T syntax but AT&T support is opt-out at compile time
2014-08-20 14:02:14 +08:00
a726402513
sparc: update core. this added/removed some instructions & groups. updated Python & Java bindings accordingly
2014-08-15 18:29:17 +08:00
91a64776a8
ppc: fix a mistake on interpreting CR registers by deleting CR8 -> CR31
2014-08-15 13:48:11 +08:00
dd3deec1e9
ppc: update core. this added new instructions, groups & registers. updated Python & Java bindings accordingly
2014-08-15 13:26:12 +08:00
0f0eb9851a
mips: update core. this added bunch of new instructions & groups. updated Python & Java bindings accordingly
2014-08-14 18:26:39 +08:00
7c089fd6c6
arm: add new mode CS_MODE_MCLASS for Cortex-M series. updated Python & Java bindings accordingly
2014-08-13 23:08:40 +08:00
b52f11f636
arm: update core. this added a new instruction UDF. also updated Python+Java bindings accordingly
2014-08-13 22:38:15 +08:00
fd0f798343
bump API & package version to 3.0
2014-08-13 14:15:27 +08:00
0b690387b3
x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change
2014-08-13 13:01:50 +08:00
027afdc179
Change the prototype of the callback in SKIPDATA option. Suggested by Ben Nagy.
...
Original prototype:
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, uint64_t offset, void* user_data);
Now we add @code_size argument to reflect the size of the input buffer @code.
Also, we change the data type of @offset to size_t because this argument indicates the
distance from currently examining bytes to @code, but not the address of the byte.
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void* user_data);
2014-07-10 15:46:10 +08:00
0df7e93a3c
Change the prototype of the callback in SKIPDATA option. Suggested by Ben Nagy.
...
Original prototype:
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, uint64_t offset, void* user_data);
Now we add @code_size argument to reflect the size of the input buffer @code.
Also, we change the data type of @offset to size_t because this argument indicates the
distance from currently examining bytes to @code, but not the address of the byte.
typedef size_t (*cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void* user_data);
2014-07-10 15:42:16 +08:00
994f336b35
ppc: rename PC_BH_NO to PC_BH_INVALID for consistency
2014-07-10 11:46:11 +08:00
dfc94e1a00
ppc: add PPC_BC_INVALID
2014-07-10 08:01:02 +08:00
650f96ce43
add new API cs_group_name() to return group name in string, given the group id
2014-07-08 08:59:27 +08:00
e105594d7b
x86: update comments for prefix[] & opcode[] fields of cs_x86
2014-07-04 11:04:46 +08:00
9f6ed7155a
x86: add @rex to cs_x86 struct. updated python & java binding for this change
2014-07-01 10:13:28 +08:00
1a66fecdbc
x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change
2014-06-26 12:09:15 +08:00
12e6e31389
x86: rename zero_opmask of cs_x86_op to avx_zero_opmask
2014-06-26 11:27:24 +08:00
2b338ce65a
x86: update some comments on x86.h
2014-06-26 10:58:17 +08:00
92a3d4c079
x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change
2014-06-25 23:10:39 +08:00
4c5eabc32b
x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings
2014-06-24 23:50:41 +08:00
0d716450fc
x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding
2014-06-24 22:51:56 +08:00
bb6440c5ef
x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change
2014-06-24 21:46:54 +08:00
d29aa6235a
x86: correct comments on x86_op_mem.scale
2014-06-24 14:52:16 +08:00
14ba46bfab
x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan.
2014-06-24 14:32:01 +08:00
fb15221666
x86: cs_x86.prefix[] should have size 4, not 5
2014-06-20 13:46:19 +08:00
1085073f8f
x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas
2014-06-18 12:16:24 +08:00
73bbbb3800
arm: add ASRS, LSRS, VCLE, VCLT instructions. update Python & Java bindings at the same time
2014-06-17 13:29:54 +08:00
3a7c136558
Fixed SPARC compilation
2014-06-10 13:24:53 +02:00
8a26bd36d5
Fix for GCC MIPS toolchain
2014-06-06 17:28:43 +02:00
Nguyen Anh Quynh