04c19beefe
rename API cs_disasm_dyn() to cs_disasm_ex(), and intentionally breaks compatibility with 1.0
2013-12-25 13:26:22 +08:00
4fe224b1ed
change API cs_disasm_dyn(): break cs_insn into 2 structures, and put all details into new structure cs_detail. this break API compatibility
2013-12-24 16:49:36 +08:00
2296d5e926
add macro CS_MAKE_VERSION, which is handy to create combined version from major & minor version so that can be compared to the result of cs_version_ex()
2013-12-22 21:01:17 +08:00
b880678a25
old cs_version() and new cs_version() are not compatible, so revert old one, and create new separate API cs_version_ex()
2013-12-22 15:20:07 +08:00
0877747bcd
cs_version() can accept NULL arguments. this is useful if you dont care about major/minor, but only want to get returned combined version
2013-12-22 14:16:28 +08:00
39a42eddfb
Change the way of supporting arch modularization
...
- Always use libapstone.so as library name, no matter which archs are compiled in.
- Add new API cs_support() to check if a particular arch is supported.
- Change cs_version(): return hexical version which encodes both major & minor version.
the return value can be comparable.
- Bump API version to 1.1
2013-12-22 10:40:58 +08:00
f185180436
cleaner implementation for arch modularization
2013-12-21 12:16:47 +08:00
7008356bc5
change cs_insn struct to follow the commit 18103e4a. fixed Python & Java bindings accordingly. attn: bindings
2013-12-20 22:02:20 +08:00
1bdb23a76d
add CS_OPT_MODE option. this allows us to change engine's mode at run-time
2013-12-20 00:04:26 +08:00
d06e2f5ac1
arm: expose alias registers SB, SL, FP & IP. attn: bindings
2013-12-19 16:50:57 +08:00
df3fb00ed7
arm: add comments to arm.h for coprocessor register types
2013-12-19 12:41:50 +08:00
7957ed1def
arm64: add some alias registers. attn: bindings
2013-12-15 00:32:20 +08:00
46a5afd810
add comment to clarify which information in cs_insn is available when CS_OPT_DETAIL = OFF
2013-12-14 11:52:06 +08:00
4994c587ad
bindings: support new 'detail' option for java & python
2013-12-14 11:39:33 +08:00
4d3e852fbb
detail option: provide instruction id even when detail option is OFF
2013-12-14 10:45:09 +08:00
a209e67f8a
support to turn on/off building instruction details
2013-12-14 00:23:41 +08:00
f0e4eed89d
Use const on all read-only buffers
2013-12-11 22:14:42 +01:00
ad89d25d05
mips: optimize Mips_map_register() to O(1). suggested by Pancake
2013-12-11 23:20:34 +08:00
66f6c2283e
mips: fix NEGU alias instruction. bug reported by Pancake
2013-12-11 21:37:24 +08:00
36df4bb6a7
revert the cs_version() API
2013-12-10 13:31:20 +08:00
bb64b0bdca
more API version to capstone.h, and remove cs_version(). reset API back to 1.0 for public release
2013-12-10 07:56:17 +08:00
bdaf3b5089
x86: delete useless constant values assigned for instructions in x86.h
2013-12-09 00:55:49 +08:00
162409e730
mips: upgrade core engine
2013-12-08 20:17:28 +08:00
731bf2a714
arm64: update core engine
2013-12-08 15:13:47 +08:00
041e25dd66
add CS_ERR_OPTION type. cs_option() returns this error code on invalid option
2013-12-06 00:37:32 +08:00
a236902656
fix CS_INSN_OFFSET: calculate offset based on the address of related instruction only
2013-12-05 20:21:09 +08:00
a84d747f7c
fix typo in CS_INSN_OFFSET
2013-12-05 18:33:34 +08:00
bb5460348b
add CS_INSN_OFFSET macro, so we can easily calculate offset of one insn, given its position in its array
2013-12-05 18:29:51 +08:00
4d70daf83d
note that Intel is default syntax
2013-12-05 09:50:50 +08:00
a2f825ff07
support comments in autogen files, so constant files are more friendly
2013-12-04 23:56:24 +08:00
79976c1370
fix some comments in capstone.h
2013-12-04 23:03:13 +08:00
8f13f3c6ab
rename @hex_code to @bytes, and move it to next to @size
2013-12-04 22:57:04 +08:00
c45b1588ef
Merge branch 'master' of https://github.com/joxeankoret/capstone into hexcode
2013-12-04 19:28:54 +08:00
367a4df66f
Partially reverted previous commit
...
I added mistakenly various local-only changes.
2013-12-04 07:15:45 +01:00
114df0ef2a
Added @hex_code member
...
It's used to retrieve the bytes of the instruction.
2013-12-04 07:11:32 +01:00
f8db76ab94
arm64: correct value of ARM64_SFT_ROR
2013-12-04 12:37:55 +08:00
ea5b79d058
move some alias registers around to after REG_MAX. this seems to fix some issues of clang, which struggles with enum that assign value from other enum
2013-12-04 12:10:47 +08:00
b39ef0bfa6
arm: added some alias registers
2013-12-04 11:52:28 +08:00
da8adaded2
API cs_option(): @value now has size_t, so mapping opaque pointer is possible for future options
2013-12-04 09:44:07 +08:00
c618db4473
change option names for cs_option(), and update python binding accordingly to support new cs_option()
2013-12-04 00:05:04 +08:00
b8ce68ec05
change cs_option() API to be more flexible with option value
2013-12-03 23:45:08 +08:00
01aba002e3
add cs_option() API. move ATT & Intel syntax here, rather than having them as CS_MODE, which is wrong
2013-12-03 21:00:09 +08:00
612b5d23e8
consistently use same param name @address rather than @offset in all cs_disasm*() API
2013-12-03 12:23:09 +08:00
f2a649e1ef
cs_insn.address also needs to be changed after the change on @offset of cs_disasm*() API
2013-12-03 12:21:01 +08:00
7d5f96d3a7
merge Radare's pull request on API change on @address of cs_disasm*()
2013-12-03 11:53:42 +08:00
029df200b4
add some comments referring to cs_errno() on failure of some APIs
2013-12-03 11:36:54 +08:00
f35e2ad35c
add @regs_read_count, @regs_write_count, @groups_count to @cs_insn. bump API to 1.4
2013-12-03 11:10:26 +08:00
c04f873791
Use uint64_t instead of size_t for addresses
2013-12-03 02:51:46 +01:00
3582bc1b9b
arm64: ARM64_GRP_JUMP is in the wrong place. move it to its place and also clarify some GRP comments
2013-12-03 09:43:27 +08:00
ec0ed8ee94
semantics: add insn group JUMP, so now we can check if this insn is branching
2013-12-02 13:55:38 +08:00
173ed2b1cb
arm: upgrade core engine
2013-12-01 22:19:27 +08:00
270d8ae712
Merge branch 'master' into x86
2013-12-01 00:28:38 +08:00
3640f3cc73
clarify in capstone.h that no API accepts CS_ARCH_* as handle anymore
2013-12-01 00:26:27 +08:00
36d143b6d0
x86: update core engine
2013-12-01 00:05:22 +08:00
6b9b6647c1
arm64: support more alias insn
2013-11-30 12:28:56 +08:00
6b7abe3c81
arm64: handle alias insn in a better way, and add support for MNEG. bug reported by Patroklos Argyroudis
2013-11-30 00:54:24 +08:00
f1656de40a
reduce the size of @operands for arm & arm64
2013-11-29 20:26:34 +08:00
90acea3530
fix arm64_op_mem & arm64_op_type structures: int32_t is enough for imm & disp
2013-11-29 17:54:17 +08:00
b42a657873
change cs_disasm() and cs_disasm_dyn() to be portable API. fix related code using these API
2013-11-29 17:40:07 +08:00
26ee41aa67
initial import
2013-11-27 12:11:31 +08:00
Nguyen Anh Quynh