refactor: remove not needed code

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-12-28 08:37:12 +08:00 · 2024-09-16 11:52:32 +00:00
parent cd55e41ce3
commit ab090b515c
6 changed files with 0 additions and 150 deletions
--- a/opencl/source/command_queue/gpgpu_walker.h
+++ b/opencl/source/command_queue/gpgpu_walker.h
@@ -28,11 +28,6 @@ class GpgpuWalkerHelper {
    using DefaultWalkerType = typename GfxFamily::DefaultWalkerType;

  public:
-    static void applyWADisableLSQCROPERFforOCL(LinearStream *pCommandStream,
-                                               const Kernel &kernel,
-                                               bool disablePerfMode);
-
-    static size_t getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel);
    static size_t getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel);

    template <typename WalkerType>
@@ -78,12 +73,6 @@ class GpgpuWalkerHelper {

  private:
    using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL;
-
-    static void addAluReadModifyWriteRegister(
-        LinearStream *pCommandStream,
-        uint32_t aluRegister,
-        AluRegisters operation,
-        uint32_t mask);
 };

 template <typename GfxFamily>
--- a/opencl/source/command_queue/gpgpu_walker_base.inl
+++ b/opencl/source/command_queue/gpgpu_walker_base.inl
@@ -23,103 +23,6 @@

 namespace NEO {

-// Performs ReadModifyWrite operation on value of a register: Register = Register Operation Mask
-template <typename GfxFamily>
-void GpgpuWalkerHelper<GfxFamily>::addAluReadModifyWriteRegister(
-    LinearStream *pCommandStream,
-    uint32_t aluRegister,
-    AluRegisters operation,
-    uint32_t mask) {
-    // Load "Register" value into CS_GPR_R0
-    using MI_LOAD_REGISTER_REG = typename GfxFamily::MI_LOAD_REGISTER_REG;
-    using MI_MATH = typename GfxFamily::MI_MATH;
-    using MI_MATH_ALU_INST_INLINE = typename GfxFamily::MI_MATH_ALU_INST_INLINE;
-
-    auto pCmd = pCommandStream->getSpaceForCmd<MI_LOAD_REGISTER_REG>();
-    MI_LOAD_REGISTER_REG cmdReg = GfxFamily::cmdInitLoadRegisterReg;
-    cmdReg.setSourceRegisterAddress(aluRegister);
-    cmdReg.setDestinationRegisterAddress(RegisterOffsets::csGprR0);
-    *pCmd = cmdReg;
-
-    // Load "Mask" into CS_GPR_R1
-    LriHelper<GfxFamily>::program(pCommandStream,
-                                  RegisterOffsets::csGprR1,
-                                  mask,
-                                  false,
-                                  false);
-
-    // Add instruction MI_MATH with 4 MI_MATH_ALU_INST_INLINE operands
-    auto pCmd3 = reinterpret_cast<uint32_t *>(pCommandStream->getSpace(sizeof(MI_MATH) + RegisterConstants::numAluInstForReadModifyWrite * sizeof(MI_MATH_ALU_INST_INLINE)));
-    MI_MATH mathCmd;
-    mathCmd.DW0.Value = 0x0;
-    mathCmd.DW0.BitField.InstructionType = MI_MATH::COMMAND_TYPE_MI_COMMAND;
-    mathCmd.DW0.BitField.InstructionOpcode = MI_MATH::MI_COMMAND_OPCODE_MI_MATH;
-    // 0x3 - 5 Dwords length cmd (-2): 1 for MI_MATH, 4 for MI_MATH_ALU_INST_INLINE
-    mathCmd.DW0.BitField.DwordLength = RegisterConstants::numAluInstForReadModifyWrite - 1;
-    *reinterpret_cast<MI_MATH *>(pCmd3) = mathCmd;
-
-    pCmd3++;
-    MI_MATH_ALU_INST_INLINE *pAluParam = reinterpret_cast<MI_MATH_ALU_INST_INLINE *>(pCmd3);
-    MI_MATH_ALU_INST_INLINE cmdAluParam;
-    cmdAluParam.DW0.Value = 0x0;
-
-    // Setup first operand of MI_MATH - load CS_GPR_R0 into register A
-    cmdAluParam.DW0.BitField.ALUOpcode =
-        static_cast<uint32_t>(AluRegisters::opcodeLoad);
-    cmdAluParam.DW0.BitField.Operand1 =
-        static_cast<uint32_t>(AluRegisters::srca);
-    cmdAluParam.DW0.BitField.Operand2 =
-        static_cast<uint32_t>(AluRegisters::gpr0);
-    *pAluParam = cmdAluParam;
-    pAluParam++;
-
-    cmdAluParam.DW0.Value = 0x0;
-    // Setup second operand of MI_MATH - load CS_GPR_R1 into register B
-    cmdAluParam.DW0.BitField.ALUOpcode =
-        static_cast<uint32_t>(AluRegisters::opcodeLoad);
-    cmdAluParam.DW0.BitField.Operand1 =
-        static_cast<uint32_t>(AluRegisters::srcb);
-    cmdAluParam.DW0.BitField.Operand2 =
-        static_cast<uint32_t>(AluRegisters::gpr1);
-    *pAluParam = cmdAluParam;
-    pAluParam++;
-
-    cmdAluParam.DW0.Value = 0x0;
-    // Setup third operand of MI_MATH - "Operation" on registers A and B
-    cmdAluParam.DW0.BitField.ALUOpcode = static_cast<uint32_t>(operation);
-    cmdAluParam.DW0.BitField.Operand1 = 0;
-    cmdAluParam.DW0.BitField.Operand2 = 0;
-    *pAluParam = cmdAluParam;
-    pAluParam++;
-
-    cmdAluParam.DW0.Value = 0x0;
-    // Setup fourth operand of MI_MATH - store result into CS_GPR_R0
-    cmdAluParam.DW0.BitField.ALUOpcode =
-        static_cast<uint32_t>(AluRegisters::opcodeStore);
-    cmdAluParam.DW0.BitField.Operand1 =
-        static_cast<uint32_t>(AluRegisters::gpr0);
-    cmdAluParam.DW0.BitField.Operand2 =
-        static_cast<uint32_t>(AluRegisters::accu);
-    *pAluParam = cmdAluParam;
-
-    // LOAD value of CS_GPR_R0 into "Register"
-    auto pCmd4 = pCommandStream->getSpaceForCmd<MI_LOAD_REGISTER_REG>();
-    cmdReg = GfxFamily::cmdInitLoadRegisterReg;
-    cmdReg.setSourceRegisterAddress(RegisterOffsets::csGprR0);
-    cmdReg.setDestinationRegisterAddress(aluRegister);
-    *pCmd4 = cmdReg;
-
-    // Add PIPE_CONTROL to flush caches
-    auto pCmd5 = pCommandStream->getSpaceForCmd<PIPE_CONTROL>();
-    PIPE_CONTROL cmdPipeControl = GfxFamily::cmdInitPipeControl;
-    cmdPipeControl.setCommandStreamerStallEnable(true);
-    cmdPipeControl.setDcFlushEnable(true);
-    cmdPipeControl.setTextureCacheInvalidationEnable(true);
-    cmdPipeControl.setPipeControlFlushEnable(true);
-    cmdPipeControl.setStateCacheInvalidationEnable(true);
-    *pCmd5 = cmdPipeControl;
-}
-
 template <typename GfxFamily>
 void GpgpuWalkerHelper<GfxFamily>::dispatchPerfCountersCommandsStart(
    CommandQueue &commandQueue,
@@ -152,15 +55,6 @@ void GpgpuWalkerHelper<GfxFamily>::dispatchPerfCountersCommandsEnd(
    pPerformanceCounters->getGpuCommands(commandBufferType, hwPerfCounter, false, size, pBuffer);
 }

-template <typename GfxFamily>
-void GpgpuWalkerHelper<GfxFamily>::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) {
-}
-
-template <typename GfxFamily>
-size_t GpgpuWalkerHelper<GfxFamily>::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) {
-    return (size_t)0;
-}
-
 template <typename GfxFamily>
 size_t GpgpuWalkerHelper<GfxFamily>::getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel) {
    return 0u;
--- a/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl
+++ b/opencl/source/command_queue/gpgpu_walker_bdw_and_later.inl
@@ -86,7 +86,6 @@ size_t EnqueueOperation<GfxFamily>::getSizeRequiredCSKernel(bool reserveProfilin
        size += 2 * sizeof(PIPE_CONTROL) + 2 * sizeof(typename GfxFamily::MI_STORE_REGISTER_MEM);
    }
    size += PerformanceCounters::getGpuCommandsSize(commandQueue.getPerfCounters(), commandQueue.getGpgpuEngine().osContext->getEngineType(), reservePerfCounters);
-    size += GpgpuWalkerHelper<GfxFamily>::getSizeForWADisableLSQCROPERFforOCL(pKernel);
    size += GpgpuWalkerHelper<GfxFamily>::getSizeForWaDisableRccRhwoOptimization(pKernel);

    return size;
@@ -97,10 +96,6 @@ size_t EnqueueOperation<GfxFamily>::getSizeRequiredForTimestampPacketWrite() {
    return sizeof(PIPE_CONTROL);
 }

-template <typename GfxFamily>
-void GpgpuWalkerHelper<GfxFamily>::adjustMiStoreRegMemMode(MI_STORE_REG_MEM<GfxFamily> *storeCmd) {
-}
-
 template <typename GfxFamily>
 void GpgpuWalkerHelper<GfxFamily>::dispatchProfilingCommandsStart(
    TagNodeBase &hwTimeStamps,
--- a/opencl/source/command_queue/hardware_interface_bdw_and_later.inl
+++ b/opencl/source/command_queue/hardware_interface_bdw_and_later.inl
@@ -28,24 +28,6 @@ inline void HardwareInterface<GfxFamily>::getDefaultDshSpace(
    dsh->getSpace(totalInterfaceDescriptorTableSize);
 }

-template <typename GfxFamily>
-inline void HardwareInterface<GfxFamily>::dispatchWorkarounds(
-    LinearStream *commandStream,
-    CommandQueue &commandQueue,
-    Kernel &kernel,
-    const bool &enable) {
-
-    if (enable) {
-        PreemptionHelper::applyPreemptionWaCmdsBegin<GfxFamily>(commandStream, commandQueue.getDevice());
-        // Implement enabling special WA DisableLSQCROPERFforOCL if needed
-        GpgpuWalkerHelper<GfxFamily>::applyWADisableLSQCROPERFforOCL(commandStream, kernel, enable);
-    } else {
-        // Implement disabling special WA DisableLSQCROPERFforOCL if needed
-        GpgpuWalkerHelper<GfxFamily>::applyWADisableLSQCROPERFforOCL(commandStream, kernel, enable);
-        PreemptionHelper::applyPreemptionWaCmdsEnd<GfxFamily>(commandStream, commandQueue.getDevice());
-    }
-}
-
 template <typename GfxFamily>
 template <typename WalkerType>
 inline void HardwareInterface<GfxFamily>::programWalker(
--- a/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl
+++ b/opencl/source/helpers/cl_gfx_core_helper_bdw_and_later.inl
@@ -18,11 +18,6 @@ inline cl_command_queue_capabilities_intel ClGfxCoreHelperHw<GfxFamily>::getAddi
    return 0;
 }

-template <typename GfxFamily>
-cl_device_feature_capabilities_intel ClGfxCoreHelperHw<GfxFamily>::getSupportedDeviceFeatureCapabilities(const RootDeviceEnvironment &rootDeviceEnvironment) const {
-    return 0;
-}
-
 static const std::vector<cl_image_format> redescribeFormats = {
    {CL_R, CL_UNSIGNED_INT8},
    {CL_R, CL_UNSIGNED_INT16},
--- a/shared/source/os_interface/product_helper_bdw_and_later.inl
+++ b/shared/source/os_interface/product_helper_bdw_and_later.inl
@@ -25,11 +25,6 @@ void ProductHelperHw<gfxProduct>::enableCompression(HardwareInfo *hwInfo) const
    hwInfo->capabilityTable.ftrRenderCompressedBuffers = hwInfo->featureTable.flags.ftrE2ECompression;
 }

-template <PRODUCT_FAMILY gfxProduct>
-uint32_t ProductHelperHw<gfxProduct>::getMaxThreadsForWorkgroupInDSSOrSS(const HardwareInfo &hwInfo, uint32_t maxNumEUsPerSubSlice, uint32_t maxNumEUsPerDualSubSlice) const {
-    return getMaxThreadsForWorkgroup(hwInfo, maxNumEUsPerSubSlice);
-}
-
 template <PRODUCT_FAMILY gfxProduct>
 bool ProductHelperHw<gfxProduct>::obtainBlitterPreference(const HardwareInfo &hwInfo) const {
    return false;