Commit Graph

518000 Commits

Author SHA1 Message Date
Shlomi Regev
13317502da [mlir] Add a null pointer check in symbol lookup (#115165)
Dead code analysis crashed because a symbol that is called/used didn't appear in the symbol
table. 
This patch fixes this by adding a nullptr check after symbol table lookup.
2024-11-12 23:31:25 +01:00
LLVM GN Syncbot
5a5122cac6 [gn build] Port 0e97b4d05a 2024-11-12 22:23:40 +00:00
Thorsten Schütt
0e97b4d05a [GlobalISel] Combine G_MERGE_VALUES of x and undef (#113616)
into anyext x

; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[TRUNC]](s32),
[[DEF]](s32)

Please continue padding merge values.

//   %bits_8_15:_(s8) = G_IMPLICIT_DEF
//   %0:_(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8)

%bits_8_15 is defined by undef. Its value is undefined and we can pick
an arbitrary value. For optimization, we pick anyext, which plays well
with the undefinedness.

//   %0:_(s16) = G_ANYEXT %bits_0_7:(s8)

The upper bits of %0 are undefined and the lower bits come from
%bits_0_7.
2024-11-12 23:23:32 +01:00
Jorge Gorbe Moya
9d85ba5724 [SandboxIR] Preserve the order of switch cases after revert. (#115577)
Preserving the case order is not strictly necessary to preserve
semantics (for example, operations like SwitchInst::removeCase will
happily swap cases around). However, I'm planning to introduce an
optional verification step for SandboxIR that will use StructuralHash to
compare IR after a revert to the original IR to help catch tracker bugs,
and the order difference triggers a difference there.
2024-11-12 14:10:46 -08:00
Nikolas Klauser
a2042521a0 [libc++] Remove _AlgPolicy from std::copy and algorithms using std::copy (#115887)
`std::copy` doesn't use the `_AlgPolicy` for anything other than calling
itself with it, so we can just remove the argument. This also removes
the need in a few other algorithms which had an `_AlgPolicy` argument
only to call `copy`.
2024-11-12 23:03:52 +01:00
Alex Bradbury
8da61a3434 [llvm][docs] Expand HowToAddABuilder with guidance on testing locally (#115024)
With <https://github.com/llvm/llvm-zorg/pull/289> and <https://github.com/llvm/llvm-zorg/pull/293> landed, it's now reasonable to ask people to test their builder configurations locally. This patch adds documentation on how to do so.
2024-11-12 22:02:20 +00:00
lialan
24a8092be7 [MLIR] Avoid vector.extract_strided_slice when not needed (#115941)
In `staticallyExtractSubvector`, When the extracting slice is the same
as source vector, do not need to emit `vector.extract_strided_slice`.

This fixes the lit test case `@vector_store_i4` in
`mlir\test\Dialect\Vector\vector-emulate-narrow-type.mlir`, where
converting from `vector<8xi4>` to `vector<4xi8>` does not need slice
extraction.

The issue was introduced in #113411 and #115070, CI failure link:
https://buildkite.com/llvm-project/github-pull-requests/builds/118845

This PR does not include a lit test case because it is a fix and the
above mentioned `@vector_store_i4` test actually tests the mechanism.

Signed-off-by: Alan Li <me@alanli.org>
2024-11-12 13:58:58 -08:00
Nikolas Klauser
36fa8bdfa0 [libc++][NFC] Remove unused functions from <__split_buffer> (#115735) 2024-11-12 22:55:59 +01:00
Krzysztof Drewniak
49f90e798f [mlir][affine] Cancel exactly-matching delinearize/linearize pairs (#115758)
If we linearize values (with an assertion tha they are disjoint) and
then delinearize that linear index with th exact same basis, we know
that these operations are exact inverses of each other and can be
replaced with the original inputs to the linearization.

Similarly, if we take a linear index, delinearize it with some bases,
and then re-linearize it with that same basis (noting that the outputs
of the delinearization are guaranteed to by `disjoint`, even if this is
not asserted on the linearize_index operation), the re-linearization is
the inverse of the delinearization, so those two operations can also be
canceled out.

This commit adds canonicalization patterns for these simple
cancelations.
2024-11-12 15:36:07 -06:00
Peng Sun
fe83a7282e [TOSA] Introduce Tosa_ElementwiseUnaryOp with Type and Shape Enforcement (#115784)
* Enforce that Tosa_ElementwiseUnaryOp requires output tensors to match
the input tensor's type and shape.
* Update the following ops to conform to Tosa_ElementwiseUnaryOp: clamp,
erf, sigmoid, tanh, cos, sin, abs, bitwise_not, ceil, clz, exp, floor,
log, logical_not, negate, reciprocal, rsqrt.
* Add invalid tests for each operator to ensure compliance with TOSA
v1.0 Specification.

Signed-off-by: Peng Sun <peng.sun@arm.com>
2024-11-12 13:35:47 -08:00
Gábor Horváth
d2db9bd708 [clang][APINotes] Add support for the SwiftEscapable attribute (#115866)
This is similar to SwiftCopyable. Also fix missing SwiftCopyable dump
for TagInfo.
2024-11-12 21:34:56 +00:00
Tex Riddell
5c2a133b13 Emit constrained atan2 intrinsic for clang builtin (#113636)
This change is part of this proposal:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294

- `Builtins.td` - Add f16 support for libm atan2 builtin
- `CGBuiltin.cpp` - Emit constraint atan2 intrinsic for clang builtin
- `clang/test/CodeGenCXX/builtin-calling-conv.cpp` - Use erff instead of
atan2 for clang builtin to lib call calling convention check, now that
atan2 maps to an intrinsic.
- add atan2 cases to llvm.experimental.constrained tests for more
backends: ARM, PowerPC, RISCV, SystemZ.
- LangRef.rst: add llvm.experimental.constrained.atan2, revise
llvm.atan2 description.

Last part of Implement the atan2 HLSL Function. Fixes #70096.
2024-11-12 13:34:29 -08:00
Tarun Prabhu
f5396748c7 [clang][flang] Support -time in both clang and flang
The -time option prints timing information for the subcommands
(compiler, linker) in a format similar to that used by gcc/gfortran.

This partially addresses requests from #89888
2024-11-12 14:27:22 -07:00
John Harrison
e5ba117274 [lldb-dap] Remove g_dap references from lldb-dap/LLDBUtils. (#115933)
This refactor removes g_dap references from lldb-dap/LLDBUtils.{h,cpp}
to allow us to create more than one g_dap instance in the future.
2024-11-12 13:19:17 -08:00
Nikolas Klauser
5b67372aec [libc++] Remove a few unused includes from <__algorithm/find_end.h> 2024-11-12 22:11:15 +01:00
Craig Topper
4bd6e15a45 [RISCV][GISel] Sync MaxIterations/ObserverLvl/EnableFullDCE for PreLegalizer combiners with AArch64. 2024-11-12 13:07:51 -08:00
Michael Jones
6aa7403858 [libc] Fix fpbits test running 80bit ld everywhere (#115937)
After #115084 the 80 bit long double tests error if sizeof(long double)
isn't 96 or 128 bits. This caused failures in long double is double
systems (since long double is 64 bits) so I've disabled the 80 bit long
double tests on systems that don't use them.
2024-11-12 12:52:08 -08:00
Benjamin Maxwell
014455a587 [SDAG] Limit sincos/frexp stack slot folding to stores chained to entry (#115906)
When the chain is not the entry node there is a risk the stores are
within a (CALLSEQ_START, CALLSEQ_END), which when the node is expanded
will lead to nested call sequences.

It should be possible to check for this and allow more cases, but for
now, let's limit this to cases where it's definitely safe.

Fixes #115323
2024-11-12 20:48:41 +00:00
Miguel A. Arroyo
5cd6e21bdd [LLD][COFF] allow saving intermediate files with /lldsavetemps (#115131)
* Parity with the `-save-temps=` flag in the `ELF` `lld` driver.
2024-11-12 22:30:48 +02:00
Haojian Wu
70d6789c7a [bazel] Port for 7302c8dbe7 2024-11-12 21:06:19 +01:00
Maksim Panchenko
d922045381 [BOLT] Use AsmInfo for address size. NFCI (#115932)
Use AsmInfo instead of DWARFObj interface for extracting address size
and format.
2024-11-12 11:53:34 -08:00
Maksim Panchenko
be89e794f7 [BOLT][AArch64] Add support for long absolute LLD thunks/veneers (#113408)
Absolute thunks generated by LLD reference function addresses recorded
as data in code. Since they are generated by the linker, they don't have
relocations associated with them and thus the addresses are left
undetected. Use pattern matching to detect such thunks and handle them
in VeneerElimination pass.
2024-11-12 11:27:08 -08:00
Krystian Stasiowski
3ab5927b97 [Clang][Comments] Make @relates an inline comment command (#115040)
According to the Doxygen documentation,
the `relates`, `related`, `relatesalso`, and `relatedalso` commands all
have a single argument. This patch changes their classification from
`VerbatimLineCommand` to `InlineCommand` so the argument is correctly
parsed.
2024-11-12 14:18:28 -05:00
PikachuHy
30753afc2a [mlir][llvm] Add support for memset.inline (#115711)
support `llvm.intr.memset.inline` in llvm-project repo before we add
support for `__builtin_memset_inline` in clangir

cc @bcardosolopes
2024-11-12 20:17:50 +01:00
Michael Kruse
f6795e6b4f [CodeExtractor] Refactor extractCodeRegion, fix alloca emission. (#114419)
Reorganize the code into phases:

 * Analyze/normalize
 * Create extracted function prototype
 * Generate the new function's implementation
 * Generate call to new function
 * Connect call to original function's CFG

The motivation is #114669 to optionally clone the selected code region
into the new function instead of moving it. The current structure made
it difficult to add such functionality since there was no obvious place
to do so, not made easier by some functions doing more than their name
suggests. For instance, constructFunction modifies code outside the
constructed function, but also function properties such as
setPersonalityFn are derived somewhere else. Another example is
emitCallAndSwitchStatement, which despite its name also inserts stores
for output parameters.

Many operations also implicitly depend on the order they are applied
which this patch tries to reduce. For instance, ExtractedFuncRetVals
becomes the list exit blocks which also defines the return value when
leaving via that block. It is computed early such that the new
function's return instructions and the switch can be generated
independently. Also, ExtractedFuncRetVals is combining the lists
ExitBlocks and OldTargets which were not always kept consistent with
each other or NumExitBlocks. The method recomputeExitBlocks() will
update it when necessary.

The coding style partially contradict the current coding standard. For
instance some local variable start with lower case letters. I updated
some, but not all occurrences to make the diff match at least some lines
as unchanged.

The patch [D96854](https://reviews.llvm.org/D96854) introduced some
confusion of function argument indexes this is fixed here as well, hence
the patch is not NFC anymore. Tested in modified CodeExtractorTest.cpp.
Patch [D121061](https://reviews.llvm.org/D121061) introduced
AllocationBlock, but not all allocas were inserted there.

Efectively includes the following fixes:
1. ce73b1672a
2. 4aaa925786
3. Missing allocas, still unfixed

Originally submitted as https://reviews.llvm.org/D115218
2024-11-12 20:12:22 +01:00
Andrzej Warzyński
7ebfbf9c87 [mlir][tensor] Update GeneralizeOuterUnitDimsPackOpPattern (#115312)
Avoid generating spurious tensor.extract_slice, follow-on for #114315.

This is best to demonstrate with an example. Here's input for
`GeneralizeOuterUnitDimsPackOpPattern`:
```mlir
%pack = tensor.pack %input
  padding_value(%pad : f32)
  inner_dims_pos = [1, 0]
  inner_tiles = [2, %tile_dim_1]
  into %output : tensor<5x1xf32> -> tensor<1x1x2x?xf32>
```

Output _before_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
  tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
// NOTE: skipped in the output _after_
%extracted_slice = tensor.extract_slice
  %padded[0, 0] [%arg3, 2] [1, 1] :
  tensor<?x2xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
  ins(%extracted_slice : tensor<?x2xf32>)
  outs(%empty : tensor<2x?xf32>)
  permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed=
  into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
  tensor<2x?xf32> into tensor<1x1x2x?xf32>
```

Output _after_:
```mlir
%padded = tensor.pad %arg0 low[0, 0] high[%0, 1] {
^bb0(%arg4: index, %arg5: index):
  tensor.yield %arg2 : f32
} : tensor<5x1xf32> to tensor<?x2xf32>
%empty = tensor.empty(%arg3) : tensor<2x?xf32>
%transposed = linalg.transpose
  ins(%padded : tensor<?x2xf32>)
  outs(%empty : tensor<2x?xf32>) permutation = [1, 0]
%inserted_slice = tensor.insert_slice %transposed
  into %arg1[0, 0, 0, 0] [1, 1, 2, %arg3] [1, 1, 1, 1] :
  tensor<2x?xf32> into tensor<1x1x2x?xf32>
```

This PR also adds a check to verify that only the last N trailing
dimensions are tiled (for some value of N). Based on the PR
discussion, this restriction seems reasonable - especially as there
are no in-tree tests requiring otherwise. For now, it also simplifies
the computation of permutations for linalg.transpose. This
restriction can be relaxed in the future if needed.
2024-11-12 19:10:24 +00:00
Andrzej Warzyński
e458434ebe [mlir][vector] Restrict narrow-type-emulation patterns (#115612)
All patterns in populateVectorNarrowTypeEmulationPatterns currently
assume a 1-D vector load/store rather than an n-D vector load/store.
This assumption is evident in ConvertVectorTransferRead, for example,
here (extracted from `ConvertVectorTransferRead`):

```cpp
auto newRead = rewriter.create<vector::TransferReadOp>(
    loc, VectorType::get(numElements, newElementType), adaptor.getSource(),
    getValueOrCreateConstantIndexOp(rewriter, loc, linearizedIndices),
    newPadding);

auto bitCast = rewriter.create<vector::BitCastOp>(
    loc, VectorType::get(numElements * scale, oldElementType), newRead);
```

Both invocations of `VectorType::get()` here generate a 1-D vector.

Attempts to use these patterns with more generic cases, such as 2-D
vectors, fail. For example, trying to cast the following 2-D case to
`i32`:

```mlir
func.func @vector_maskedload_2d_i8_negative(
  %idx1: index,
  %idx2: index,
  %num_elems: index,
  %passthru: vector<2x4xi8>) -> vector<2x4xi8> {

    %0 = memref.alloc() : memref<3x4xi8>
    %mask = vector.create_mask %num_elems, %num_elems : vector<2x4xi1>
    %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
      memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8>
    return %1 : vector<2x4xi8>

}
```

For example, casting to i32 produces:
```bash
error: 'vector.bitcast' op failed to verify that all of {source, result} have same rank
    %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
         ^
```

Instead of reworking these patterns (that's going to require much more
effort), I’ve marked them as 1-D only and extended
"TestEmulateNarrowTypePass" with an option to disable the Memref type
converter - that's to be able to add negative tests (otherwise, the type
converter throws an error we can't really test for). While not ideal,
this workaround should suit a test pass.
2024-11-12 19:08:54 +00:00
Steven Perron
ba572abeb4 [SPIRV] Add reads from image buffer for shaders. (#115178)
This commit adds an intrinsic that will read from an image buffer. We
chose to match the name of the DXIL intrinsic for simplicity in clang.

We cannot reuse the existing openCL readimage function because that is
not a reserved name in HLSL.

I considered trying to refactor generateReadImageInst, so that we could
share code between the two implementations. However, most of the code in
generateReadImageInst is concerned with trying to figure out which type
of image read is being done. Once we factor out the code that will be
common, then we end up with just a single call to the MIRBuilder being
common.
2024-11-12 14:04:45 -05:00
Zaara Syeda
aaa37d6755 [PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
Enable merging all constants without looking at use in GlobalMerge by
default to replace PPCMergeStringPool pass on Linux.
2024-11-12 14:02:01 -05:00
Joseph Huber
c284326755 [libc] Disable block test on AMDGPU as well
Summary:
Recently started failing on AMDGPU as well, will disable until I can
bisect it.
2024-11-12 12:39:13 -06:00
William Tran-Viet
13ced90b00 [libc] {u}lkbits broken on riscv32 (#115799)
- Re-enabled ulkbits and lkbits for Risc-V
- Bumped `int_lk_t` to a `signed long long` and a `uint_ulk_t` to an
`unsigned long long` to guarantee they both fit in 8 bytes, which `long
_Accum` and `unsigned long _Accum` are defaulted to on 32bit
architectures.

This is probably inconvenient on systems that have a word size larger
than 64 bits?

#115778
2024-11-12 10:38:08 -08:00
Finn Plummer
a93cbd4e76 [SPIRV] Audit select Result in SPIRVInstructionSelector (#115193)
- as per the definition of `select` in GlobalISel/InstructionSelector.h
the return value is a boolean denoting if the select was successful
- doing `Result |=` is incorrect as all inserted instructions should be
succesful, hence we change to using `Result &=`
- ensure that the return value of all BuildMI instructions are
propagated correctly
2024-11-12 10:31:01 -08:00
Kazu Hirata
4048c64306 [llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
2024-11-12 10:09:42 -08:00
Kazu Hirata
c784d321d9 [ThinLTO] Use heterogenous lookups with std::map (NFC) (#115812)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.
2024-11-12 10:09:28 -08:00
Kazu Hirata
dfb864a735 [TableGen] Use heterogenous lookups with std::map (NFC) (#115810)
Heterogenous lookups allow us to call find with StringRef, avoiding a
temporary heap allocation of std::string.

This patch introduces alias:

  using DiagsInGroup = std::map<std::string, GroupInfo, std::less<>>;

because the raw type is a bit mouthful.
2024-11-12 10:08:59 -08:00
Valentin Clement (バレンタイン クレメン)
853d52b838 [flang][cuda] Support derived type in cuf.data_transfer conversion (#115557)
Support derived type in `cuf.data_transfer` conversion by computing
their size in bytes.
2024-11-12 10:05:53 -08:00
Elvis Wang
3431d133cc [RISCV][TTI] Implement instruction cost for vp.reduce.* #114184
The VP variants simply return the same costs as the non-VP variants.
This assumes that reductions are VL predicated, and that VL predication
has no additional cost.
2024-11-12 10:01:35 -08:00
Christudasan Devadasan
2b5b57c5cf [AMDGPU] Skip non-wwm reg implicit-def from bb prolog (#115834)
Currently all implicit-def instructions are part of
bb prolog. We should only include the wwm-register's
implicit definitions into the BB prolog. The other
vector class registers' implicit defs when exist at
the bb top might cause interference when pushed the
LR_split copy insertion downwards. The SplitKit is
very strict on altering the insertion points and will
assert such instances.
2024-11-12 23:30:57 +05:30
Shoaib Meenai
1791b25f43 [clang][CIR] Change buildX functions to emitX (#115568)
The buildX naming convention originated when the CIRGen implementation
was planned to be substantially different from original CodeGen. CIRGen
is now a much closer adaption of CodeGen, and the emitX to buildX
renaming just makes things more confusing, since CodeGen also has some
helper functions whose names start with build or Build, so it's not
immediately clear which CodeGen function corresponds to a CIRGen buildX
function. Rename the buildX functions back to emitX to fix this.
2024-11-12 09:56:25 -08:00
Balazs Benics
ae7392bf5c Reapply "[analyzer][NFC] Make RegionStore dumps deterministic" (#115884)
This is reapplies #115615 without using tuples. The eager call of
`getRegion()` and `getOffset()` could cause crashes when the Store had
symbolic bindings.

Here I'm fixing the crash by lazily calling those getters.

Also, the tuple version poorly sorted the Clusters. The memory spaces
should have come before the regular clusters.
Now, that is also fixed here, demonstrated by the test.
2024-11-12 18:56:02 +01:00
Ellis Hoag
57c33acac8 [MachineSink] Sink into consistent blocks for optsize funcs (#115367)
Do not consider profile data when choosing a successor block to sink
into for optsize functions. This should result in more consistent
instruction sequences which will improve outlining and ICF. We've
observed a slight codesize improvement in a large binary. This is
similar reasoning to https://github.com/llvm/llvm-project/pull/114607.

Using profile data to select a block to sink into was original added in
d04f7596e7.
2024-11-12 09:53:27 -08:00
Ellis Hoag
b8d6659bff [CodeLayout] Do not flip branch condition when using optsize (#114607)
* Do not use profile data when flipping a branch condition when
optimizing for size. This should improving outlining and ICF due to more
uniform instruction sequences.
* Refactor `optimizeBranches()` to use early `continue`s
* Use the correct debug location for `insertBranch()`
2024-11-12 09:50:29 -08:00
Rahman Lavaee
789de766b5 [NFC,SHT_LLVM_BB_ADDR_MAP] Fix undefined behaviour in ELF.cpp. (#115830)
`BBEntries` is defined outside of the loop and is used after move which
is undefined behavior.
2024-11-12 09:49:56 -08:00
Ryosuke Niwa
2c6424e691 [webkit.UncountedLambdaCapturesChecker] Ignore trivial functions and [[clang::noescape]]. (#114897)
This PR makes webkit.UncountedLambdaCapturesChecker ignore trivial
functions as well as the one being passed to an argument with
[[clang::noescape]] attribute. This dramatically reduces the false
positive rate for this checker.

To do this, this PR replaces VisitLambdaExpr in favor of checking
lambdas via VisitDeclRefExpr and VisitCallExpr. The idea is that if a
lambda is defined but never called or stored somewhere, then capturing
whatever variable in such a lambda is harmless.

VisitCallExpr explicitly looks for direct invocation of lambdas and
registers its DeclRefExpr to be ignored in VisitDeclRefExpr. If a lambda
is being passed to a function, it checks whether its argument is
annotated with [[clang::noescape]]. If it's not annotated such, it
checks captures for their safety.

Because WTF::switchOn could not be annotated with [[clang::noescape]] as
function type parameters are variadic template function so we hard-code
this function into the checker.

In order to check whether "this" pointer is ref-counted type or not, we
override TraverseDecl and record the most recent method's declaration.

In addition, this PR fixes a bug in isUnsafePtr that it was erroneously
checking whether std::nullopt was returned by isUncounted and
isUnchecked as opposed to the actual boolean value.

Finally, this PR also converts the accompanying test to use -verify and
adds a bunch of tests.
2024-11-12 09:46:28 -08:00
Kazu Hirata
06e0869624 [BOLT] Fix warnings
This patch fixes:

  bolt/lib/Profile/StaleProfileMatching.cpp:694:24: error: unused
  variable 'BinHash' [-Werror,-Wunused-variable]

  bolt/lib/Profile/YAMLProfileWriter.cpp:206:61: error: missing field
  'GUID' initializer [-Werror,-Wmissing-field-initializers]

  bolt/lib/Profile/YAMLProfileReader.cpp:840:16: error: unused
  variable 'MatchedWithPseudoProbes' [-Werror,-Wunused-variable]
2024-11-12 09:39:57 -08:00
Sam Elliott
6d91d7ce6a [RISCV][NFC] Split branch-relaxation test
This change splits the llvm/test/CodeGen/RISCV/branch-relaxation.ll test
which contained comments saying that different test functions were valid
or not on rv32/rv64. Not only was this confusing, but the inline
assembly in the test was being passed values wider than xlen on rv32.
2024-11-12 09:35:16 -08:00
Kadir Cetinkaya
5f140ba547 Revert "[clang] Introduce diagnostics suppression mappings (#112517)"
This reverts commit 12e3ed8de8.
This reverts commit 41e3919ded.

There are some buildbot breakages in
https://lab.llvm.org/buildbot/#/builders/18/builds/6832.
2024-11-12 18:30:42 +01:00
erichkeane
39351f8e46 [OpenACC] Implement AST/Sema for combined constructs
Combined constructs (OpenACC 3.3 section 2.11) are a short-cut for
writing a `loop` construct immediately inside of a `compute` construct.
However, this interaction requires we do additional work to ensure that
we get the semantics between the two correct, as well as diagnostics.

This patch adds the semantic analysis for the constructs (but no
    clauses), as well as the AST nodes.
2024-11-12 09:26:25 -08:00
Fraser Cormack
7387338007 [libclc] Add some include guards to CLC declarations. NFC 2024-11-12 17:25:40 +00:00
Fangrui Song
207e5cccee [test] Move CodeGen/aarch64-* into the AArch64 subfolder
Similar to other targets (AMDGPU, Mips, PowerPC, RISCV, X86, ...)

`ninja check-clang-codegen-aarch64` can be used to test this subfolder.

Pull Request: https://github.com/llvm/llvm-project/pull/115818
2024-11-12 09:24:26 -08:00