Commit Graph

561070 Commits

Author SHA1 Message Date
anoopkg6
40aa91f12a [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (#169850)
This is a re-submission of original reverted patch [(#162396)
](https://github.com/llvm/llvm-project/pull/162396url)for adding TySan
support for systemzZ along with build failure patch
[#169746](https://github.com/llvm/llvm-project/pull/169746).

See conversations in #169746.

Co-authored-by: anoopkg6 <anoopkg6@github.com>
2025-12-01 17:52:24 +01:00
Durgadoss R
fddf7b0510 [MLIR][NVVM] Update mbarrier.arrive.expect_tx Op (#169922)
This patch updates the mbarrier.arrive.expect_tx Op.
It also adds an Op for its arrive_drop version.

* No change in the existing inline-asm lowering.
   This functionality continues to work as is.
* An optional return value is added for shared_cta space.
* The scope and semantics are added as attributes.
* Inline-PTX lowering is available when `predicate` is provided.
  Otherwise, the Op lowers to intrinsics.
* lit tests are added to verify the lowering to intrinsics.
* Specific negative tests are added to check the invalid cases for
inline-ptx lowering.

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2025-12-01 22:19:34 +05:30
Krzysztof Parzyszek
f3cce97ba7 [flang][OpenMP] Remove directive-specific code from GetOmpDirectiveNa… (#170157)
…me, NFC

It is unnecessary, existing overloads handle these cases already.
2025-12-01 10:43:45 -06:00
LLVM GN Syncbot
bb06f90943 [gn build] Port 9438b741d4 2025-12-01 16:32:09 +00:00
Jonas Devlieghere
9438b741d4 [lldb] Add VirtualDataExtractor for virtual address translation (#168802)
Introduce VirtualDataExtractor, a DataExtractor subclass that enables
reading data at virtual addresses by translating them to physical buffer
offsets using a lookup table. The lookup table maps virtual address
ranges to physical offsets and enforces boundaries to prevent reads from
crossing entry limits.

The new class inherits from DataExtractor, overriding GetData and
PeekData to provide transparent virtual address translation for most of
the DataExtractor methods. The exception are the unchecked methods, that
bypass those methods and are overloaded as well.
2025-12-01 08:27:42 -08:00
Simon Pilgrim
318d932ca0 [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (#170160) 2025-12-01 16:24:40 +00:00
Simon Pilgrim
9f54c2a674 [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (#170158) 2025-12-01 16:20:43 +00:00
Jordan Rupprecht
46c34bec13 [benchmark][NFC] Update cc_binary load (#169710)
cc_binary now needs to be loaded from the rules_cc repo

I don't think this file is actually used, but updating it to be more
syntactically correct anyway.
2025-12-01 10:00:53 -06:00
Aiden Grossman
979a987d3a [WPD] Change Devirt Cutoff to use DebugCounter (#170009)
This removes the presence of global state from within the pass which is
blocking some efforts around test daemonization and is not good design
practice in general for LLVM. See

https://discourse.llvm.org/t/rfc-reducing-process-creation-overhead-in-llvm-regression-tests/88612/11
for more discussion.

This patch replaces the usage of global state with a DebugCounter, which
helps fix the global state problem and also increases the flexibility of
the option as now an explicit range can be passed.

Co-authored-by: Mingming Liu <mingmingl@google.com>
2025-12-01 15:34:54 +00:00
Simon Pilgrim
b76cada909 [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (#170148)
Limited to 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants
2025-12-01 15:31:01 +00:00
Yu Hao
37858b087a [clang][ASTMatchers] Add arrayTypeLoc ast matcher for ArrayTypeLoc (#168990)
There's `arrayType` matcher for matching `ArrayType`, but no matcher for
`ArrayTypeLoc`. This change complements it.

Note that there's already `hasElementTypeLoc` matcher, which was
declared together with the `hasElementType` matcher.
2025-12-01 10:21:17 -05:00
Aiden Grossman
73889c3571 [llvm-exegesis] Add CLI Option to set Fixed RNG seed
The primary motivation for this is to set a fixed RNG seed for flaky
tests. This also has the bonus of adding debug logging for what seed
gets used which can make it much easier to reproduce issues that only
happen occasionally and are seed-dependent.

Reviewers: sjoerdmeijer, davemgreen, mshockwave

Reviewed By: davemgreen

Pull Request: https://github.com/llvm/llvm-project/pull/170013
2025-12-01 07:12:40 -08:00
Aaron
10ceca8a96 [lldb-dap] Fix segfault in JSONUtils.cpp when GetUUIDString() returns nullptr (#169844)
When creating a stack frame in JSONUtils.cpp CreateStackFrame() the code
constructs a std::string from module.GetUUIDString(), which can return
nullptr in some cases (as documented in the implementation of
SBModule::GetUUIDString()). This causes a segmentation fault when passed
to the std::string constructor.

This fix adds a null check before constructing the UUID string, falling
back to an empty string if nullptr is returned. The existing empty check
ensures the moduleId field is omitted from the JSON when no UUID exists.

rdar://163811812

---------

Co-authored-by: Ebuka Ezike <yerimyah1@gmail.com>
2025-12-01 15:06:48 +00:00
Arseniy Zaostrovnykh
7b6bf8b060 [NFC][analyzer] const ptr param in AnalysisConsumer::getModeForDecl (#170145)
This is a tiny change that would make the function contract more clear
and our work downstream easier.
2025-12-01 14:48:59 +00:00
Yingwei Zheng
c7c6c0a45c [AggressiveInstCombine] Fix memory location for alias analysis (#169953)
When LOps.RootInsert comes after LI2, since we use LI2 as the new insert
point, we should make sure the memory region accessed by LOps isn't
modified. However, the original implementation passes the bit width
`LOps.LoadSize` as the number of bytes to be accessed, causing BasicAA
to return NoAlias:

a941e15074/llvm/lib/Analysis/BasicAliasAnalysis.cpp (L1658-L1667)
With `-aa-trace`, we get:
```
End ptr getelementptr inbounds nuw (i8, ptr @g, i64 4) @ LocationSize::precise(1),   %gep1 = getelementptr i8, ptr %p, i64 4 @ LocationSize::precise(32) = NoAlias
```
This patch uses `getTypeStoreSize` to compute the correct access size
for LOps. Instead of modifying the MemoryLocation for End (i.e.,
`LOps.RootInsert`), it also uses the computed base and AATag for
correctness.

Closes https://github.com/llvm/llvm-project/issues/169921.
2025-12-01 22:46:16 +08:00
Erich Keane
97e0573f9e [CIR] Start printing/parsing func 'attributes' (#169674)
This patch adds a print and parse ability for the func to have
MLIR-standard 'attributes' printed along side the standard function.

This patch also seeds the initial "disallowed" list so that we don't
print things that we have custom printing for, AND will disallow them
from being parsed. I believe this list to be complete, and it passes all
tests.

This printing of attributes is necessary for testing some OpenACC things
that putting into the normal func-printing seems unnecessary.
2025-12-01 06:44:42 -08:00
Nikolas Klauser
3b9e203364 [Clang] Add __builtin_common_reference (#121199) 2025-12-01 15:42:33 +01:00
Ryotaro Kasuga
fa6d611f0a [DA] Remove special handling for SCEVAddExpr in GCD MIV (#169927)
In `gcdMIVtest`, there is logic that assumes the addition(s) of
`SCEVAddExpr` don't overflow without any checks. Adding overflow checks
would be fine, but this part appeart to be less useful. So this patch
removes it.

Fix one of the tests added in #169926.
2025-12-01 14:34:10 +00:00
Mehdi Amini
235d44d8b6 Fix LLVM test to use %python instead of python
This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.
2025-12-01 06:26:39 -08:00
Mend Renovate
aa04b654b4 [Github] Update GHA Dependencies (#170057)
This PR contains the following updates:

| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.0.0` -> `v6.1.0` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.4` -> `v4.31.5` | `v4.31.6` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.19` -> `v1.2.20` | |
2025-12-01 06:26:22 -08:00
Mend Renovate
1ced99aa4a [Github] Update actions/upload-artifact action to v5 (#170058)
This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | major | `v4.6.2` -> `v5.0.0` |
2025-12-01 06:23:12 -08:00
Jakub Kuderski
ad656d3a19 [mlir][linalg][arm] Fix use of fill in arm integration tests (#170143)
Follow up to
https://github.com/llvm/llvm-project/pull/169567#issuecomment-3596220014
2025-12-01 14:19:07 +00:00
Igor Wodiany
2538f6382a [mlir][spirv] Support (de)serialization of block operands in spirv.Switch (#168899) 2025-12-01 14:15:02 +00:00
Aiden Grossman
4978cd3cdf Revert "Fix LLVM test to use %python instead of python"
This reverts commit b4c30b0e1e.

This substitution is not available from within these tests.
2025-12-01 06:08:04 -08:00
Nico Weber
aaa59e3489 [gn] port 29fef3a51e (bolt PassTests) 2025-12-01 09:05:38 -05:00
Ryotaro Kasuga
461433fea2 [DA] Add overflow check when calculating Delta in GCD MIV (#169928)
Add overflow check when computing `Delta` in `gcdMIVtest`.

Fix one of the tests added by #169926.
2025-12-01 14:03:52 +00:00
Mehdi Amini
b4c30b0e1e Fix LLVM test to use %python instead of python
This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.
2025-12-01 05:53:02 -08:00
Ryan Holt
b27301ff5d [mlir][linalg] Re-enable linalg runtime verification test (#170129)
Test seems to pass after re-enabling without any additional changes.
2025-12-01 08:52:20 -05:00
David Green
c25ad27174 [AArch64] Remove unused references to MVT::f80. (#169545)
These f80 fp types are only supported on X86 and can be removed from
AArch64. It looks like they were copied from another backend by mistake.
2025-12-01 13:43:16 +00:00
Ryotaro Kasuga
d431f38860 [DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (#169926)
Add two test cases where dependencies are missed due to overflows. These
will be fixed by #169927 and #169928, respectively.
2025-12-01 22:36:01 +09:00
Robert Imschweiler
8808beeb1a Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (#168554)
Reland https://github.com/llvm/llvm-project/pull/164392 with Fortran support moved to follow-up PR
2025-12-01 14:18:31 +01:00
Jasmine Tang
4a6451af7b Fix typo in attr.td: Avaiable -> Available (#170116)
Follow up to #163618
2025-12-01 12:53:47 +00:00
Simon Pilgrim
05ad84095a [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (#170113)
Similar to fdiv, we should be trying to concat these high latency instructions together
2025-12-01 12:45:45 +00:00
Giacomo Castiglioni
d3edc94d11 [MLIR][GPU] subgroup_mma fp64 extension - take 2 (#169061)
This PR re-lands #165873.

This PR extends the gpu.subgroup_mma_* ops to support fp64 type.
The extension requires special handling during the lowering to nvvm due
to the return type for load ops for fragment a and b (they return a
scalar instead of a struct).

The original PR did not guard the new test based on the required
architecture (sm80) which lead to a failure on the cuda runners with T4
GPUs.
2025-12-01 07:39:59 -05:00
Paul Walker
8478de3d00 [LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)
This PR implements catch all handling for widening the scalable
subvector operand (INSERT_SUBVECTOR) or result (EXTRACT_SUBVECTOR). It
does this via the stack using masked memory operations. With general
handling available we can add optimiations for specific cases.
2025-12-01 12:32:58 +00:00
Simon Pilgrim
989ac4c9db [X86] Add tests showing failure to concat fp rounding intrinsics together. (#170108) 2025-12-01 12:07:01 +00:00
Sohaib Iftikhar
6157d46259 [MLIR|BUILD]: Fix for 8ceeba838 (#170110) 2025-12-01 12:00:58 +00:00
Ryotaro Kasuga
58770200a7 [DA] Clean up unnecessary member function declarations (#170106)
Follow-up for #169047. The previous PR moved some functions from DA to
Delinearization, but the member function declarations were not updated
accordingly. This patch removes them.
2025-12-01 11:57:09 +00:00
Luke Lau
d0df51bc93 [ConstantRange] Allow casting to the same bitwidth. NFC (#170102)
From the review in
https://github.com/llvm/llvm-project/pull/169527#discussion_r2567122387,
there are some users where we want to extend or truncate a ConstantRange
only if it's not already the destination bitwidth. Previously this
asserted, so this PR relaxes it to just be a no-op, similar to
IRBuilder::createZExt and friends.
2025-12-01 19:51:56 +08:00
Timm Baeder
48931e5e59 [clang][bytecode] Check memcmp builtin for one-past-the-end pointers (#170097)
We can't read from those and will run into an assertion sooner or later.

Fixes https://github.com/llvm/llvm-project/issues/170031
2025-12-01 12:43:35 +01:00
Mehdi Amini
577cd6fb02 [LIT] Workaround the 60 processed limit on Windows (#157759)
Python multiprocessing is limited to 60 workers at most:

6bc65c30ff/Lib/concurrent/futures/process.py (L669-L672)

The limit being per thread pool, we can work around it by using multiple
pools on windows when we want to actually use more workers.
2025-12-01 11:39:25 +00:00
Jan Patrick Lehr
130746addf [MLIR] Fix build after #169982 (#170107) 2025-12-01 12:37:09 +01:00
Jasmine Tang
edd1856686 [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (#152397)
Fixes https://github.com/llvm/llvm-project/issues/71844
2025-12-01 11:32:46 +00:00
Simon Pilgrim
0e721b75aa [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (#170098)
Can only do this for 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants
2025-12-01 11:28:34 +00:00
Simon Pilgrim
6c0a02f2ad [X86] Add tests showing failure to concat sqrt intrinsics together. (#170096)
Similar to fdiv, we should be trying to concat these high latency instructions together
2025-12-01 11:23:43 +00:00
Tom Eccles
bf22687c48 [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (#170095)
From OpenMP 4.0:

> When an if clause is present on a cancel construct and the if
expression
> evaluates to false, the cancel construct does not activate
cancellation.
> The cancellation point associated with the cancel construct is always
> encountered regardless of the value of the if expression.

This wording is retained unmodified in OpenMP 6.0.

This re-opens the already approved PR #164587, which was closed by
accident. The only changes are a rebase.
2025-12-01 11:23:14 +00:00
Tom Eccles
b60a84a46f Revert "[flang][TBAA] refine TARGET/POINTER encoding" (#170105)
Reverts llvm/llvm-project#169544

[Regressed](https://lab.llvm.org/buildbot/#/builders/143/builds/12956)
gfortran test suite
2025-12-01 11:19:12 +00:00
Ming Yan
2c21790983 Revert "[MLIR][SCF] Sink scf.if from scf.while before region into after region in scf-uplift-while-to-for" (#169888)
Reverts llvm/llvm-project#165216
It is implemented in #169892 .
2025-12-01 19:02:02 +08:00
Gergely Bálint
29fef3a51e [BOLT] Improve DWARF CFI generation for pac-ret binaries (#163381)
During InsertNegateRAState pass we check the annotations on
instructions,
to decide where to generate the OpNegateRAState CFIs in the output
binary.

As only instructions in the input binary were annotated, we have to make
a judgement on instructions generated by other BOLT passes.
Incorrect placement may cause issues when an (async) unwind request
is received during the new "unknown" instructions.

This patch adds more logic to make a more informed decision on by taking
into account:
- unknown instructions in a BasicBlock with other instruction have the
same RAState. Previously, if the BasicBlock started with an unknown
instruction,
the RAState was copied from the preceding block. Now, the RAState is
copied from
  the succeeding instructions in the same block.
- Some BasicBlocks may only contain instructions with unknown RAState,
As explained in issue #160989, these blocks already have incorrect
unwind info. Because of this, the last known RAState based on the layout order
is copied.

Updated bolt/docs/PacRetDesign.md to reflect changes.
2025-12-01 12:00:31 +01:00
Ming Yan
8ceeba8381 [MLIR][SCF] Canonicalize redundant scf.if from scf.while before region into after region (#169892)
When a `scf.if` directly precedes a `scf.condition` in the before region
of a `scf.while` and both share the same condition, move the if into the
after region of the loop. This helps simplify the control flow to enable
uplifting `scf.while` to `scf.for`.
2025-12-01 18:54:21 +08:00