Commit Graph

380096 Commits

Author SHA1 Message Date
Craig Topper
61a238e6e1 [RISCV] Add isel patterns for fixed vector fmsub/fnmadd/fnmsub. 2021-02-16 12:03:33 -08:00
Thomas Raoux
adfd3c7083 [mlir] Fix memref_cast + subview folder when reducing rank
When the destination of the subview has a lower rank than its source we need to
fix the result type of the new subview op.

Differential Revision: https://reviews.llvm.org/D96804
2021-02-16 12:00:59 -08:00
Kadir Cetinkaya
cdef5a7161 [clangd] Fix windows buildbots after ecea7218fb 2021-02-16 20:57:08 +01:00
LLVM GN Syncbot
f350fe8c55 [gn build] Port ecea7218fb 2021-02-16 19:23:52 +00:00
LLVM GN Syncbot
abb7570235 [gn build] Port 310b35304c 2021-02-16 19:23:52 +00:00
Raphael Isemann
f88b502d9b [FileCollector] Fix that the file system case-sensitivity check was inverted
real_path returns an `std::error_code` which evaluates to `true` in case an
error happens and `false` if not. This code was checking the inverse, so
case-insensitive file systems ended up being detected as case sensitive.

Tested using an LLDB reproducer test as we anyway need a real file system and
also some matching logic to detect whether the respective file system is
case-sensitive (which the test is doing via some Python checks that we can't
really emulate with the usual FileCheck logic).

Fixes rdar://67003004

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D96795
2021-02-16 20:21:32 +01:00
Kadir Cetinkaya
ecea7218fb [clangd] Treat paths case-insensitively depending on the platform
Path{Match,Exclude} and MountPoint were checking paths case-sensitively
on all platforms, as with other features, this was causing problems on
windows. Since users can have capital drive letters on config files, but
editors might lower-case them.

This patch addresses that issue by:
- Creating regexes with case-insensitive matching on those platforms.
- Introducing a new pathIsAncestor helper, which performs checks in a
  case-correct manner where needed.

Differential Revision: https://reviews.llvm.org/D96690
2021-02-16 20:20:53 +01:00
Craig Topper
acfab44eeb [RISCV] Add add/sub saturation tests that exist on ARM/AArch64/X86
There have been some recent changes to the type legalization for
some of these intrinsics so I thought it would be good to have
coverage.
2021-02-16 11:19:57 -08:00
Rong Xu
310b35304c [SampleFDO][NFC] Refactor SampleProfile.cpp
Refactor SampleProfile.cpp to use the core code in CodeGen.
The main changes are:
(1) Move SampleProfileLoaderBaseImpl class to a header file.
(2) Split SampleCoverageTracker to a head file and a cpp file.
(3) Move the common codes (common options and callsiteIsHot())
to the common cpp file.

Differential Revision: https://reviews.llvm.org/D96455
2021-02-16 11:18:21 -08:00
Peter Collingbourne
cddc53ef08 libunwind: Don't attempt to authenticate a null return address.
Null return addresses can appear at the bottom of the stack (i.e. the
frame corresponding to the entry point). Authenticating these addresses
will set the error code in the address, which will lead to a segfault
in the sigreturn trampoline detection code. Fix this problem by not
authenticating null addresses.

Differential Revision: https://reviews.llvm.org/D96560
2021-02-16 11:18:02 -08:00
Jessica Paquette
962b73dd0f Revert "[AArch64][GlobalISel] Fold constants into G_GLOBAL_VALUE"
This reverts commit 61b4702a40.

We were seeing some test failures in SPECINT2006 due to this change. Reverting
to investigate.
2021-02-16 10:50:12 -08:00
Zbigniew Sarbinowski
5f9be2c3e3 [SystemZ][ZOS] Prefer -nostdlib++ as opposed to -nodefaultlibs when building c++ libraries
Let's use -nostdlib++ rather than -nodefaultlibs when building libc++/libc++abi/libunwind libraries. The default is -nostdlib++ if supported by a build compiler like it is the case with clang, otherwise -nodefaultlibs is used as before.

This change is needed to avoid additional changes at the link step and not to increase the maintenance costs. If clang with -nodefaultlibs is used all the libraries which are removed but required would have to be manually added in. This set of libraries are unique and will send out.

The propose change will allow to make the link step simple for other platforms as well.

Reviewed By: #libc, #libc_abi, ldionne

Differential Revision: https://reviews.llvm.org/D95875
2021-02-16 18:42:14 +00:00
Michael Kruse
6c05005238 [OpenMP] Implement '#pragma omp tile', by Michael Kruse (@Meinersbur).
The tile directive is in OpenMP's Technical Report 8 and foreseeably will be part of the upcoming OpenMP 5.1 standard.

This implementation is based on an AST transformation providing a de-sugared loop nest. This makes it simple to forward the de-sugared transformation to loop associated directives taking the tiled loops. In contrast to other loop associated directives, the OMPTileDirective does not use CapturedStmts. Letting loop associated directives consume loops from different capture context would be difficult.

A significant amount of code generation logic is taking place in the Sema class. Eventually, I would prefer if these would move into the CodeGen component such that we could make use of the OpenMPIRBuilder, together with flang. Only expressions converting between the language's iteration variable and the logical iteration space need to take place in the semantic analyzer: Getting the of iterations (e.g. the overload resolution of `std::distance`) and converting the logical iteration number to the iteration variable (e.g. overload resolution of `iteration + .omp.iv`). In clang, only CXXForRangeStmt is also represented by its de-sugared components. However, OpenMP loop are not defined as syntatic sugar. Starting with an AST-based approach allows us to gradually move generated AST statements into CodeGen, instead all at once.

I would also like to refactor `checkOpenMPLoop` into its functionalities in a follow-up. In this patch it is used twice. Once for checking proper nesting and emitting diagnostics, and additionally for deriving the logical iteration space per-loop (instead of for the loop nest).

Differential Revision: https://reviews.llvm.org/D76342
2021-02-16 09:45:07 -08:00
Alex Zinenko
ce8f10d6cb [mlir] Simplify ModuleTranslation for LLVM IR
A series of preceding patches changed the mechanism for translating MLIR to
LLVM IR to use dialect interface with delayed registration. It is no longer
necessary for specific dialects to derive from ModuleTranslation. Remove all
virtual methods from ModuleTranslation and factor out the entry point to be a
free function.

Also perform some cleanups in ModuleTranslation internals.

Depends On D96774

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96775
2021-02-16 18:42:52 +01:00
Simon Pilgrim
df45c18135 [DAG] PromoteIntRes_ADDSUBSHLSAT - promote ISD::UADDSAT as clamped add
Similar to D96622, we're better off just promoting uaddsat(x,y) -> umin(add(x,y),c) instead of trying to perform a shifted uaddsat.

I initially tried to just use shifted promotion in cases where we didn't have a legal/custom umin - but we don't appear to have any targets that have uaddsat but not umin, so imo we're better off always using the umin and avoid an untested shifted uaddsat code path.

Differential Revision: https://reviews.llvm.org/D96767
2021-02-16 17:37:44 +00:00
Craig Topper
07ca13fe07 [RISCV] Add support for fixed vector mask logic operations.
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D96741
2021-02-16 09:34:00 -08:00
Craig Topper
064ada4ec6 [SelectionDAG][AArch64] Restrict matchUnaryPredicate to only handle SPLAT_VECTOR for scalable vectors.
fde2466171 added support for
scalable vectors to matchUnaryPredicate by handling SPLAT_VECTOR in
addition to BUILD_VECTOR. This was used to enabled UDIV/SDIV/UREM/SREM
by constant expansion in BuildUDIV/BuildSDIV in TargetLowering.cpp

The caller there expects to call getBuildVector from the match factors.
This leads to a crash right now if there is a SPLAT_VECTOR of
fixed vectors since the number of vectors won't match the number
of elements.

To fix this, this patch updates the callers to check the opcode
instead of whether the type is fixed or scalable. This assumes
that only 3 opcodes are handled by matchUnaryPredicate so
I've added an assertion to the final else to check that opcode.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D96174
2021-02-16 09:22:46 -08:00
Alex Zinenko
2ab57c503e [mlir] tighten LLVM dialect verifiers to generate valid LLVM IR
Verification of the LLVM IR produced when translating various MLIR dialects was
only active when calling the translation programmatically. This has led to
several cases of invalid LLVM IR being generated that could not be caught with
textual mlir-translate tests. Add verifiers for these cases and fix the tests
in preparation for enforcing the validation of LLVM IR.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96774
2021-02-16 18:18:21 +01:00
Florian Hahn
211147c5ba [AArch64] Convert CMP/SELECT sign patterns to OR & ASR.
ICMP & SELECT patterns extracting the sign of a value can be simplified
to OR & ASR (see  https://alive2.llvm.org/ce/z/Xx4iZ0).

This does not save any instructions in IR, but it is profitable on
AArch64, because we need at least 2 extra instructions to materialize 1
and -1 for the SELECT.

The improvements result in ~5% speedups on loops of the form

    static int sign_of(int x) {
      if (x < 0) return -1;
      return 1;
    }

    void foo(const int *x, int *res, int cnt) {
      for (int i=0;i<cnt;i++)
        res[i] = sign_of(x[i]);
    }

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D96596
2021-02-16 17:17:34 +00:00
Siva Chandra Reddy
dba14814a6 [libc][NFC] Make few maths functions buildable outside of LLVM libc build.
Few math functions manipulate errno. They assumed that LLVM libc's errno
is available. However, that might not be the case when these functions
are used in a libc which does not use LLVM libc's errno. This change
switches such uses of LLVM libc's errno to the normal public errno macro.
This does not affect LLVM libc's build because the include order ensures
we get LLVM libc's errno. Also, the header check rule ensures we are only
including LLVM libc's errno.h.
2021-02-16 09:14:29 -08:00
Kazu Hirata
1a323c8a96 [analyzer] Fix a warning
This patch fixes a warning from -Wcovered-switch-default.  The switch
statement in question handles all the enum values.
2021-02-16 09:12:07 -08:00
Alex Zinenko
9cd47a26d5 [mlir] add verifiers for NVVM and ROCDL kernel attributes
Make sure they can only be attached to LLVM functions as a result of converting
GPU functions to the LLVM Dialect.
2021-02-16 18:06:54 +01:00
Arnold Schwaighofer
627cfd4394 [coro async] Don't promote allocas to the frame or rewrite swifterror if there are no suspend points
Also don't call function to update the call graph if there are no
clones. The function will fail.

rdar://74277860

Differential Revision: https://reviews.llvm.org/D96620
2021-02-16 09:05:38 -08:00
clementval
8260232cdd [flang][fir] Add fir-opt tool
This patch introduce the fir-opt tool. Similar to mlir-opt for FIR.
It will be used in following patches to test fir opt and round-trip.

Reviewed By: schweitz, mehdi_amini

Differential Revision: https://reviews.llvm.org/D96535
2021-02-16 11:48:40 -05:00
David Green
1e007cf43c [ARM] Use rGPR for writeback vldrs
From what I can tell, a writeback is unpredictable with LR for both
loads and stores. This changes the operand from a gprnopc to a rGPR in
both cases (which I believe is essentially a NFC due to the tied-def
already being a rGPR.)

Differential Revision: https://reviews.llvm.org/D96723
2021-02-16 16:44:47 +00:00
Matt Arsenault
a7455d7b7c AMDGPU: Remove kills following clusters of memory instruction
In a future commit, soft clauses will be hinted with kill instructions
rather than forced together with bundles. Look for kills that look
like this, and erase them. I'm not sure if the check for specific uses
is worthwhile, or if it would be better to just unconditionally erase
kills.

This reduces test churn in a future patch.
2021-02-16 10:49:28 -05:00
Simon Pilgrim
5dfba562dd [DAG] Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d)))
Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))) -> bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))

Attempt to fold from a shuffle of a pair of binops to a binop of shuffles, as long as one/both of the binop sources are also shuffles that can be merged with the outer shuffle. This should guarantee that we remove one binop without introducing any additional shuffles.

Technically there's potential for a merged shuffle's lowering to be poorer than the original shuffle, but it could also be better, and I'm not seeing any regressions as long as we keep the 'don't merge splats' rule already present in MergeInnerShuffle.

This expands and generalizes an existing X86 combine and attempts to merge either of each binop's sources (with an on-the-fly commutation of the shuffle mask) - we couldn't do that in the x86 version as it had to stay in a form that DAGCombine's MergeInnerShuffle would still recognise.

Differential Revision: https://reviews.llvm.org/D96345
2021-02-16 15:46:34 +00:00
Matt Arsenault
c320e8196a AMDGPU: Fix debug info handling in post-RA bundler
This was allowing debug instructions to break the bundling, which
would change scheduling behavior. Bundle debug info / kills inside
the bundle. This seems to work OK, although the asm printer doesn't
understand these in a bundle. This implicitly expects the memory
legalizer to unbundle. It would probably be slightly nicer to move
these after.

Rewrite the loop to be clearer and make sure we don't end a bundle on
a meta instruction, only allow them in between other valid bundle
instructions.
2021-02-16 10:42:06 -05:00
serge-sans-paille
3c8bf29f14 Reduce the number of attributes attached to each function
This takes advantage of the implicit default behavior to reduce the number of
attributes, which in turns reduces compilation time. I've observed -3% in
instruction count when compiling sqlite3 amalgamation with -O0

Differential Revision: https://reviews.llvm.org/D96400
2021-02-16 16:19:54 +01:00
Thomas Raoux
397336dcab [mlir][vector] Add missing support for contract of integer lowering.
Some of the lowering of vector.contract didn't support integer case. Since
reduction of integer cannot accumulate we always break up the reduction op, it
should be merged by a separate canonicalization if possible.

Differential Revision: https://reviews.llvm.org/D96461
2021-02-16 07:13:30 -08:00
Thomas Raoux
807e5467f3 [mlir] Add canonicalization for tensor_cast + tensor_to_memref
This helps bufferization passes by removing tensor_cast operations.

Differential Revision: https://reviews.llvm.org/D96745
2021-02-16 07:11:09 -08:00
Lei Zhang
cb1a42359b [mlir][vector] Move splitting transfer ops into a separate entry point
These patterns unrolls transfer read/write ops if the vector consumers/
producers are extract/insert slices op. Transfer ops can map to hardware
load/store functionalities, where the vector size matters for bandwidth
considerations. So these patterns should be collected separately, instead
of being generic canonicalization patterns.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96782
2021-02-16 10:04:34 -05:00
Colin Finck
0f5020af7f [libc++] Build thread_win32.cpp only if LIBCXX_HAS_PTHREAD_API is not set
This allows building libc++ against winpthreads from mingw-w64 to support
operating systems older than Windows 7. The remaining libc++ code already
supports `WIN32` with `LIBCXX_HAS_PTHREAD_API`.

Note that there is also the older "pthreads-win32". However, that support
library implements `pthread_t` as a struct, which violates the libc++
assumption that `pthread_t` is always a scalar and can be compared,
ordered, and set to zero.

Differential Revision: https://reviews.llvm.org/D96339
2021-02-16 10:03:42 -05:00
Lei Zhang
d8c7f442ea [mlir][vector] Add support for unrolling vector.fma
Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96781
2021-02-16 09:56:25 -05:00
Pavel Labath
85f025e5b3 [lldb/test] Test lldb-server named pipe functionality on windows
lldb-server can use a named pipe to communicate the port number it is
listening on. This windows bits of this are already implemented, but we
did not have a test for that, most likely because python does not have
native pipe functionality.

This patch implements the windows bits necessary to test this. I'm using
the ctypes package to call the native APIs directly to avoid a
dependency to non-standard python packages. This introduces some amount
of boilerplate, but our named pipe use case is fairly limited, so we
should not end up needing to wrap large chunks of windows APIs.

Surprisingly to changes to lldb-server were needed to make the test
pass.

Differential Revision: https://reviews.llvm.org/D96260
2021-02-16 15:47:39 +01:00
Sam McCall
b6e52d8fa7 [clangd] Give modules access to filesystem, scheduler, and index.
This finally makes it possible to implement useful modules.

Differential Revision: https://reviews.llvm.org/D96726
2021-02-16 15:30:08 +01:00
LLVM GN Syncbot
b2db4934ed [gn build] Port 40cc63ea6e 2021-02-16 14:23:58 +00:00
Sam McCall
40cc63ea6e [clangd] Modules can have a public API. NFC
Differential Revision: https://reviews.llvm.org/D96730
2021-02-16 15:22:57 +01:00
Ta-Wei Tu
6b612a7baf [NFC][LoopInterchange] Explicitly pass both InnerLoop and OuterLoop to processLoop
This is a split patch of D96644.

Explicitly pass both `InnerLoop` and `OuterLoop` to function `processLoop` to remove the need to swap elements in loop list and allow making loop list an `ArrayRef`.
Also, fix inconsistent spellings of `OuterLoopId` and `Inner Loop Id` in debug log.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96650
2021-02-16 22:17:44 +08:00
David Truby
e86f9ba15c [llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals
When a literal that cannot fit in the immediate form of the fmov instruction
is used to initialise an SVE vector, an extra unnecessary fmov is currently
generated. This patch adds an extra codegen pattern preventing the extra
instruction from being generated.

Differential Revision: https://reviews.llvm.org/D96700

Co-Authored-By: Paul Walker <paul.walker@arm.com>
2021-02-16 14:16:33 +00:00
Jan Svoboda
ed86328515 [clang][cli] Add explicit round-trip test
This patch adds a test that verifies all `CompilerInvocation` members are filled correctly during command line round-trip.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96705
2021-02-16 14:56:26 +01:00
Florian Hahn
f64c626069 [VPlan] Remove unused Phi member from VPWidenPHIRecipe (NFC).
The member is not needed any longer after recent changes.
2021-02-16 13:53:06 +00:00
Simon Pilgrim
420420de57 [DAG] Avoid APInt copies by directly using the APInt reference from getAPIntValue. NFCI. 2021-02-16 13:50:34 +00:00
Simon Pilgrim
dd879f7dc9 [DAG] Use APInt::extractBits instead of lshr().trunc(). NFCI.
Avoids so many APInt instances by directly using the APInt reference from getAPIntValue.
2021-02-16 13:50:33 +00:00
Kerry McLaughlin
ba1e150d03 [SVE] Add support for scalable vectorization of loops with int/fast FP reductions
This patch enables scalable vectorization of loops with integer/fast reductions, e.g:

```
unsigned sum = 0;
for (int i = 0; i < n; ++i) {
  sum += a[i];
}
```

A new TTI interface, isLegalToVectorizeReduction, has been added to prevent
reductions which are not supported for scalable types from vectorizing.
If the reduction is not supported for a given scalable VF,
computeFeasibleMaxVF will fall back to using fixed-width vectorization.

Reviewed By: david-arm, fhahn, dmgreen

Differential Revision: https://reviews.llvm.org/D95245
2021-02-16 13:50:06 +00:00
Jan Svoboda
32389346ed [clang][cli] Generate -f[no-]finite-loops arguments
This patch generates the `-f[no-]finite-loops` arguments from `CompilerInvocation` (added in D96419), fixing test failures of Clang built with `-DCLANG_ROUND_TRIP_CC1_ARGS=ON`.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96761
2021-02-16 14:39:20 +01:00
Denys Petrov
13f4448ae7 [analyzer] Rework SValBuilder::evalCast function into maintainable and clear way
Summary: Refactor SValBuilder::evalCast function. Make the function clear and get rid of redundant and repetitive code. Unite SValBuilder::evalCast, SimpleSValBuilder::dispatchCast, SimpleSValBuilder::evalCastFromNonLoc and SimpleSValBuilder::evalCastFromLoc functions into single SValBuilder::evalCast.
This patch shall not change any previous behavior.

Differential Revision: https://reviews.llvm.org/D90157
2021-02-16 14:30:51 +02:00
Faris Rehman
10826ea7b1 [flang][driver] Add extension options and -finput-charset
Add the following options:
* -fimplicit-none and -fno-implicit-none
* -fbackslash and -fno-backslash
* -flogical-abbreviations and -fno-logical-abbreviations
* -fxor-operator and -fno-xor-operator
* -falternative-parameter-statement
* -finput-charset=<value>

Summary of changes:
- Enable extensions in CompilerInvocation#ParseFrontendArgs
- Add encoding_ to Fortran::frontend::FrontendOptions
- Add encoding to Fortran::parser::Options

Differential Revision: https://reviews.llvm.org/D96407
2021-02-16 11:27:06 +00:00
Tres Popp
787d771dce [mlir] Don't return nullptrs from scf::IfOp::getSuccessorRegions
Previously this might happen if there was no elseRegion and the method
was asked for all successor regions.

Differential Revision: https://reviews.llvm.org/D96764
2021-02-16 12:06:30 +01:00
James Henderson
c96fee98db [llvm-symbolizer][test] Add explicit tests for CODE and DATA
These directives force the associated address to be interpreted as a
function or data respectively. CODE is the default when not specified.

Differential Revision: https://reviews.llvm.org/D96712

Reviewed by: MaskRay
2021-02-16 10:59:25 +00:00