Platform/ROCK5B: Remove vendor from platform name

Fix "Radxa Radxa"

.github/workflows/build.yml

@@ -17,7 +17,7 @@ jobs:
         CONFIGURATION: [Debug, Release]
     steps:
       - name: Checkout
-        uses: actions/checkout@v2
+        uses: actions/checkout@v3
       - name: Submodule init
         shell: bash
         run: git submodule update --init --recursive

build.sh

@@ -8,6 +8,7 @@ function _help(){
 	echo "Options: "
 	echo "	--device DEV, -d DEV:    build for DEV."
 	echo "	--all, -a:               build all devices."
+	echo "	--gui:                   Enable simple-init GUI."
 	echo "	--release MODE, -r MODE: Release mode for building, default is 'DEBUG', 'RELEASE' alternatively."
 	echo "	--toolchain TOOLCHAIN:   Set toolchain, default is 'GCC5'."
 	echo " 	--skip-rootfs-gen:       skip generating SimpleInit rootfs to speed up building."
@@ -109,6 +110,7 @@ function _build(){
 		-p "${ROOTDIR}/${DSC_FILE}" \
 		-b "${_MODE}" \
 		-D FIRMWARE_VER="${GITCOMMIT}" \
+		-D ENABLE_SIMPLE_INIT="${BUILD_GUI}" \
 		||return "$?"
 
 	_pack
@@ -133,7 +135,8 @@ DISTCLEAN=false
 TOOLCHAIN=GCC5
 export ROOTDIR OUTDIR
 export GEN_ROOTFS=true
-OPTS="$(getopt -o t:d:haCDO:r -l toolchain:,device:,help,all,skip-rootfs-gen,clean,distclean,outputdir:,release: -n 'build.sh' -- "$@")"||exit 1
+export BUILD_GUI=false
+OPTS="$(getopt -o t:d:haCDO:r -l toolchain:,device:,help,all,skip-rootfs-gen,gui,clean,distclean,outputdir:,release: -n 'build.sh' -- "$@")"||exit 1
 eval set -- "${OPTS}"
 while true
 do	case "${1}" in
@@ -143,6 +146,7 @@ do	case "${1}" in
 		-D|--distclean) DISTCLEAN=true;shift;;
 		-O|--outputdir) OUTDIR="${2}";shift 2;;
 		--skip-rootfs-gen) GEN_ROOTFS=false;shift;;
+		--gui) BUILD_GUI=true;shift;;
 		-r|--release) MODE="${2}";shift 2;;
 		-t|--toolchain) TOOLCHAIN="${2}";shift 2;;
 		-h|--help) _help 0;shift;;

edk2-platforms/Platform/OrangePi/Drivers/LogoDxe/Logo.c

@@ -0,0 +1,144 @@
+/** @file
+  Logo DXE Driver, install Edkii Platform Logo protocol.
+
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+  Copyright (c) 2022 Rockchip Electronics Co. Ltd.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Uefi.h>
+#include <Protocol/HiiDatabase.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/HiiImageEx.h>
+#include <Protocol/PlatformLogo.h>
+#include <Protocol/HiiPackageList.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+
+typedef struct {
+  EFI_IMAGE_ID                          ImageId;
+  EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute;
+  INTN                                  OffsetX;
+  INTN                                  OffsetY;
+} LOGO_ENTRY;
+
+STATIC EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx;
+STATIC EFI_HII_HANDLE            mHiiHandle;
+STATIC LOGO_ENTRY                mLogos[] = {
+  {
+    IMAGE_TOKEN (IMG_LOGO),
+    EdkiiPlatformLogoDisplayAttributeCenter,
+    0,
+    0
+  }
+};
+
+/**
+  Load a platform logo image and return its data and attributes.
+
+  @param This              The pointer to this protocol instance.
+  @param Instance          The visible image instance is found.
+  @param Image             Points to the image.
+  @param Attribute         The display attributes of the image returned.
+  @param OffsetX           The X offset of the image regarding the Attribute.
+  @param OffsetY           The Y offset of the image regarding the Attribute.
+
+  @retval EFI_SUCCESS      The image was fetched successfully.
+  @retval EFI_NOT_FOUND    The specified image could not be found.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+GetImage (
+  IN     EDKII_PLATFORM_LOGO_PROTOCOL          *This,
+  IN OUT UINT32                                *Instance,
+     OUT EFI_IMAGE_INPUT                       *Image,
+     OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute,
+     OUT INTN                                  *OffsetX,
+     OUT INTN                                  *OffsetY
+  )
+{
+  UINT32 Current;
+
+  if (Instance == NULL || Image == NULL ||
+      Attribute == NULL || OffsetX == NULL || OffsetY == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  Current = *Instance;
+  if (Current >= ARRAY_SIZE (mLogos)) {
+    return EFI_NOT_FOUND;
+  }
+
+  (*Instance)++;
+  *Attribute = mLogos[Current].Attribute;
+  *OffsetX   = mLogos[Current].OffsetX;
+  *OffsetY   = mLogos[Current].OffsetY;
+
+  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle,
+                        mLogos[Current].ImageId, Image);
+}
+
+STATIC EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = {
+  GetImage
+};
+
+/**
+  Entrypoint of this module.
+
+  This function is the entrypoint of this module. It installs the Edkii
+  Platform Logo protocol.
+
+  @param  ImageHandle       The firmware allocated handle for the EFI image.
+  @param  SystemTable       A pointer to the EFI System Table.
+
+  @retval EFI_SUCCESS       The entry point is executed successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeLogo (
+  IN EFI_HANDLE               ImageHandle,
+  IN EFI_SYSTEM_TABLE         *SystemTable
+  )
+{
+  EFI_STATUS                  Status;
+  EFI_HII_PACKAGE_LIST_HEADER *PackageList;
+  EFI_HII_DATABASE_PROTOCOL   *HiiDatabase;
+  EFI_HANDLE                  Handle;
+
+  Status = gBS->LocateProtocol (&gEfiHiiDatabaseProtocolGuid, NULL,
+                  (VOID **) &HiiDatabase);
+  ASSERT_EFI_ERROR (Status);
+
+  Status = gBS->LocateProtocol (&gEfiHiiImageExProtocolGuid, NULL,
+                  (VOID **) &mHiiImageEx);
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Retrieve HII package list from ImageHandle
+  //
+  Status = gBS->OpenProtocol (ImageHandle, &gEfiHiiPackageListProtocolGuid,
+                  (VOID **) &PackageList, ImageHandle, NULL,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR,
+      "HII Image Package with logo not found in PE/COFF resource section\n"));
+    return Status;
+  }
+
+  //
+  // Publish HII package list to HII Database.
+  //
+  Status = HiiDatabase->NewPackageList (HiiDatabase, PackageList, NULL,
+                          &mHiiHandle);
+  if (!EFI_ERROR (Status)) {
+    Handle = NULL;
+    Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
+                    &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, NULL);
+  }
+  return Status;
+}

edk2-platforms/Platform/OrangePi/Drivers/LogoDxe/Logo.idf

@@ -0,0 +1,10 @@
+// @file
+// Platform Logo image definition file.
+//
+// Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+// Copyright (c) 2022 Rockchip Electronics Co. Ltd.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+
+#image IMG_LOGO Logo.bmp

edk2-platforms/Platform/OrangePi/Drivers/LogoDxe/LogoDxe.inf

@@ -0,0 +1,48 @@
+## @file
+#  The default logo bitmap picture shown on setup screen.
+#
+#  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+#  Copyright (c) 2022 Rockchip Electronics Co. Ltd.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = LogoDxe
+  FILE_GUID                      = 4b55f0bc-8b1a-11ec-bd4b-f42a7dcb925d
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = InitializeLogo
+#
+#  This flag specifies whether HII resource section is generated into PE image.
+#
+  UEFI_HII_RESOURCE_SECTION      = TRUE
+
+[Sources]
+  Logo.bmp
+  Logo.c
+  Logo.idf
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  DebugLib
+
+[Protocols]
+  gEfiHiiDatabaseProtocolGuid        ## CONSUMES
+  gEfiHiiImageExProtocolGuid         ## CONSUMES
+  gEfiHiiPackageListProtocolGuid     ## PRODUCES CONSUMES
+  gEdkiiPlatformLogoProtocolGuid     ## PRODUCES
+
+[Depex]
+  gEfiHiiDatabaseProtocolGuid AND
+  gEfiHiiImageExProtocolGuid

edk2-platforms/Platform/OrangePi/OrangePi5/AcpiTables/AcpiTables.inf

@@ -15,6 +15,7 @@
   FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD
   MODULE_TYPE                    = USER_DEFINED
   VERSION_STRING                 = 1.0
+  RK_COMMON_ACPI_DIR             = Silicon/Rockchip/RK3588/AcpiTables
 
 #
 # The following information is for reference only and not required by the build tools.
@@ -23,15 +24,14 @@
 #
 
 [Sources]
-  AcpiTables.h
-  Madt.aslc
-  Fadt.aslc
-  Gtdt.aslc
   Dsdt.asl
-  Spcr.aslc
-  Mcfg.aslc
-  RK3588PcieIort.aslc
-  Dbg2.aslc
+  $(RK_COMMON_ACPI_DIR)/Madt.aslc
+  $(RK_COMMON_ACPI_DIR)/Fadt.aslc
+  $(RK_COMMON_ACPI_DIR)/Gtdt.aslc
+  $(RK_COMMON_ACPI_DIR)/Spcr.aslc
+  $(RK_COMMON_ACPI_DIR)/Mcfg.aslc
+  $(RK_COMMON_ACPI_DIR)/RK3588PcieIort.aslc
+  $(RK_COMMON_ACPI_DIR)/Dbg2.aslc
 
 [Packages]
   ArmPkg/ArmPkg.dec

edk2-platforms/Platform/OrangePi/OrangePi5/AcpiTables/Dsdt.asl

@@ -17,88 +17,12 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
 {
   Scope (\_SB_)
   {
-    Device (CPU0)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x0)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-    Device (CPU1)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x1)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU2)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x2)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU3)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x3)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU4)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x4)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU5)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x5)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU6)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x6)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU7)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x7)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
+    include ("Cpu.asl")
 
     // include ("Pcie.asl")
     // include ("Sata.asl")
     // include ("Emmc.asl")
+    include ("Sdhc.asl")
     // include ("Gmac.asl")
     // include ("Gpio.asl")
     // include ("I2c.asl")
@@ -108,6 +32,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
     // won't work on Windows, will trigger bugcheck by usbehci
     // include ("Usb2.asl")
 
-    include ("Usb3.asl")
+    include ("Usb3Host0.asl")
+    include ("Usb3Host2.asl")
   }
 }

edk2-platforms/Platform/OrangePi/OrangePi5/AcpiTables/Usb3.asl

@@ -1,54 +0,0 @@
-/** @file
-*  DWC3 XHCI Controllers.
-*
-*  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "AcpiTables.h"
-
-Device (XHC0) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, Zero)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfc000000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 252 }
-        })
-        Return (RBUF)
-    }   
-}
-
-Device (XHC1) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, One)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfc400000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 253 }
-        })
-        Return (RBUF)
-    }   
-}
-
-// This only supports USB 3.0 devices.
-// USB2 DP / DM are connected to one of the EHCI controllers instead (EHC1 on ROCK 5B).
-
-Device (XHC2) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, 2)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfcd00000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 254 }
-        })
-        Return (RBUF)
-    }   
-}

edk2-platforms/Platform/OrangePi/OrangePi5/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf

@@ -1,65 +0,0 @@
-#/** @file
-#
-#  SMBIOS Table for the RaspberryPi platform
-#
-#  Copyright (c) 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
-#  Copyright (c) Microsoft Corporation. All rights reserved.
-#  Copyright (c) 2013 Linaro.org
-#  Copyright (c) 2020, ARM Limited. All rights reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x0001001A
-  BASE_NAME                      = PlatformSmbiosDxe
-  FILE_GUID                      = BAD0554E-22E9-4D83-9AFD-CC87727A1A45
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  ENTRY_POINT                    = PlatformSmbiosDriverEntryPoint
-
-[Sources]
-  PlatformSmbiosDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  ArmPkg/ArmPkg.dec
-  Platform/Rockchip/RK3588/RK3588.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  ArmLib
-  UefiBootServicesTableLib
-  MemoryAllocationLib
-  BaseMemoryLib
-  BaseLib
-  UefiLib
-  UefiDriverEntryPoint
-  DebugLib
-  PrintLib
-  TimeBaseLib
-  SdramLib
-
-[Protocols]
-  gEfiSmbiosProtocolGuid           # PROTOCOL SOMETIMES_CONSUMED
-#  gRaspberryPiFirmwareProtocolGuid ## CONSUMES
-
-[Guids]
-# gConfigDxeFormSetGuid
-
-[Depex]
-  gEfiSmbiosProtocolGuid
-#  AND gRaspberryPiFirmwareProtocolGuid
-
-[Pcd]
-  gArmTokenSpaceGuid.PcdFdBaseAddress
-  gArmTokenSpaceGuid.PcdFdSize
-  gArmTokenSpaceGuid.PcdSystemMemorySize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
-#  gRaspberryPiTokenSpaceGuid.PcdFdtSize
-#  gRaspberryPiTokenSpaceGuid.PcdRamMoreThan3GB
-#  gRaspberryPiTokenSpaceGuid.PcdRamLimitTo3GB

edk2-platforms/Platform/OrangePi/OrangePi5/Drivers/RK3588Dxe_opi5/RK3588Dxe.c

@@ -1,888 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2021, Rockchip Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-#include <Uefi.h>
-#include <Library/ArmLib.h>
-#include <Protocol/Cpu.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootManagerLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/RK806.h>
-#include <Library/AcpiLib.h>
-#include <Protocol/DevicePath.h>
-#include <Protocol/DevicePathFromText.h>
-#include <Protocol/EmbeddedGpio.h>
-#include <Protocol/LoadedImage.h>
-#include <Protocol/PlatformBootManager.h>
-#include <Protocol/PlatformVirtualKeyboard.h>
-#include <Protocol/AndroidBootImg.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/NonDiscoverableDeviceRegistrationLib.h>
-#include <Protocol/NonDiscoverableDevice.h>
-#include <Protocol/ArmScmi.h>
-#include <Protocol/ArmScmiClockProtocol.h>
-
-#include <Soc.h>
-#include <Library/CruLib.h>
-#include <RK3588RegsPeri.h>
-#include "RK3588Dxe.h"
-
-#define SCMI_CLK_CPUL			0
-#define SCMI_CLK_CPUB01			2
-#define SCMI_CLK_CPUB23			3
-
-#define CP_UNCONNECTED    0x0
-#define  CP_PCIE          0x01
-#define  CP_SATA          0x10
-#define  CP_USB3          0x20
-
-STATIC
-EFI_STATUS
-BoardInitSetCpuSpeed (
-  VOID
-  )
-{
-  EFI_STATUS             Status;
-  SCMI_CLOCK_PROTOCOL    *ClockProtocol;
-  EFI_GUID               ClockProtocolGuid = ARM_SCMI_CLOCK_PROTOCOL_GUID;
-  UINT64                 CpuRate;
-  UINT32                 ClockId;
-  UINT32                 ClockProtocolVersion;
-  BOOLEAN                Enabled;
-  CHAR8                  ClockName[SCMI_MAX_STR_LEN];
-  UINT32                 TotalRates = 0;
-  UINT32                 ClockRateSize;
-  SCMI_CLOCK_RATE        *ClockRate;
-  SCMI_CLOCK_RATE_FORMAT ClockRateFormat;
-  UINT32                 ClockIds[3]= {SCMI_CLK_CPUL, SCMI_CLK_CPUB01, SCMI_CLK_CPUB23};
-
-  Status = gBS->LocateProtocol (
-                  &ClockProtocolGuid,
-                  NULL,
-                  (VOID**)&ClockProtocol
-                  );
-  if (EFI_ERROR (Status)) {
-    ASSERT_EFI_ERROR (Status);
-    return Status;
-  }
-
-  Status = ClockProtocol->GetVersion (ClockProtocol, &ClockProtocolVersion);
-  if (EFI_ERROR (Status)) {
-    ASSERT_EFI_ERROR (Status);
-    return Status;
-  }
-  DEBUG ((DEBUG_ERROR, "SCMI clock management protocol version = %x\n",
-    ClockProtocolVersion));
-
-  ClockId = 0;
-
-  for (int i=0 ; i<3; i=i+1 )
-  {
-    ClockId = ClockIds[i];
-    Status = ClockProtocol->GetClockAttributes (
-                              ClockProtocol,
-                              ClockId,
-                              &Enabled,
-                              ClockName
-                              );
-    if (EFI_ERROR (Status)) {
-      ASSERT_EFI_ERROR (Status);
-      return Status;
-    }
-
-    Status = ClockProtocol->RateGet (ClockProtocol, ClockId, &CpuRate);
-    if (EFI_ERROR (Status)) {
-      ASSERT_EFI_ERROR (Status);
-      return Status;
-    }
-
-    DEBUG ((EFI_D_WARN, "SCMI: %a: Current rate is %uHz\n", ClockName, CpuRate));
-
-    TotalRates = 0;
-    ClockRateSize = 0;
-    Status = ClockProtocol->DescribeRates (
-                              ClockProtocol,
-                              ClockId,
-                              &ClockRateFormat,
-                              &TotalRates,
-                              &ClockRateSize,
-                              ClockRate
-                              );
-    if (EFI_ERROR (Status) && Status != EFI_BUFFER_TOO_SMALL) {
-      ASSERT_EFI_ERROR (Status);
-      return Status;
-    }
-    ASSERT (Status == EFI_BUFFER_TOO_SMALL);
-    ASSERT (TotalRates > 0);
-    ASSERT (ClockRateFormat == ScmiClockRateFormatDiscrete);
-    if (Status != EFI_BUFFER_TOO_SMALL ||
-        TotalRates == 0 ||
-        ClockRateFormat != ScmiClockRateFormatDiscrete) {
-      return EFI_DEVICE_ERROR;
-    }
-    
-    ClockRateSize = sizeof (*ClockRate) * TotalRates;
-    ClockRate = AllocatePool (ClockRateSize);
-    ASSERT (ClockRate != NULL);
-    if (ClockRate == NULL) {
-      return EFI_OUT_OF_RESOURCES;
-    }
-    Status = ClockProtocol->DescribeRates (
-                              ClockProtocol,
-                              ClockId,
-                              &ClockRateFormat,
-                              &TotalRates,
-                              &ClockRateSize,
-                              ClockRate
-                              );
-    if (EFI_ERROR (Status)) {
-      ASSERT_EFI_ERROR (Status);
-      FreePool (ClockRate);
-      return Status;
-    }
-
-    CpuRate = ClockRate[TotalRates - 1].DiscreteRate.Rate;
-    FreePool (ClockRate);
-
-    DEBUG ((EFI_D_WARN, "SCMI: %a: New rate is %uHz\n", ClockName, CpuRate));
-
-    Status = ClockProtocol->RateSet (
-                              ClockProtocol,
-                              ClockId,
-                              CpuRate
-                              );
-    if (EFI_ERROR (Status)) {
-      ASSERT_EFI_ERROR (Status);
-      return Status;
-    }
-
-    Status = ClockProtocol->RateGet (ClockProtocol, ClockId, &CpuRate);
-    if (EFI_ERROR (Status)) {
-      ASSERT_EFI_ERROR (Status);
-      return Status;
-    }
-
-    DEBUG ((EFI_D_WARN, "SCMI: %a: Current rate is %uHz\n", ClockName, CpuRate));
-  }
-
-  return EFI_SUCCESS;
-}
-
-STATIC
-VOID
-UartInit (
-  IN VOID
-  )
-{
-  //UINT32     Val;
-
-  DEBUG((EFI_D_WARN, "RK3588InitPeripherals: UartInit()\n"));
-  /* make UART1 out of reset */
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1);
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1);
-  /* make UART2 out of reset */
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2);
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2);
-  /* make UART3 out of reset */
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3);
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3);
-  /* make UART4 out of reset */
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4);
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4);
-
-  /* make DW_MMC2 out of reset */
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2);
-
-  /* enable clock for BT/WIFI */
-  //Val = MmioRead32 (PMUSSI_ONOFF8_REG) | PMUSSI_ONOFF8_EN_32KB;
-  //MmioWrite32 (PMUSSI_ONOFF8_REG, Val);
-}
-
-STATIC EMBEDDED_GPIO        *mGpio;
-
-STATIC
-VOID
-MtcmosInit (
-  IN VOID
-  )
-{
-  //UINT32     Data;
-
-  DEBUG((EFI_D_WARN, "RK3588InitPeripherals: MtcmosInit()\n"));
-  /* enable MTCMOS for GPU */
-  //MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D);
-  //do {
-  //  Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0);
-  //} while ((Data & PW_EN0_G3D) == 0);
-}
-
-STATIC
-VOID
-GmacIomuxInit (
-  IN VOID
-  )
-{
-  DEBUG((EFI_D_WARN, "RK3588InitPeripherals: GmacIomuxInit()\n"));
-  GmacIomux(0);
-}
-
-static struct regulator_init_data rk806_master[] = {
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK2, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1100000),
-
-	RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 900000),
-	RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 750000),
-	RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 850000),
-
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1800000),
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 1800000),
-	RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
-};
-
-static struct regulator_init_data rk806_slaver[] = {
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK1, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK2, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK3, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK4, 3300000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK5, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK6, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK7, 1800000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK8, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_BUCK10, 850000),
-
-	RK8XX_VOLTAGE_INIT(SLAVER_NLDO1, 750000),
-	RK8XX_VOLTAGE_INIT(SLAVER_NLDO2, 850000),
-	RK8XX_VOLTAGE_INIT(SLAVER_NLDO3, 850000),
-	RK8XX_VOLTAGE_INIT(SLAVER_NLDO4, 1200000),
-	RK8XX_VOLTAGE_INIT(SLAVER_NLDO5, 1200000),
-
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO1, 1800000),
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO2, 1800000),
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO3, 1800000),
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO4, 3300000),
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO5, 2800000),
-	RK8XX_VOLTAGE_INIT(SLAVER_PLDO6, 1800000),
-};
-
-static UINTN ComPhyReg[3][2] = {
-  {0xFEE00000, 0xFD5BC000},
-  {0xFEE10000, 0xFD5C0000},
-  {0xFEE20000, 0xFD5C4000},
-};
-
-static UINTN AhciReg[3] = {
-  0xFE210000,
-  0xFE220000,
-  0xFE230000,
-};
-
-UINTN
-EFIAPI
-InitComPhyConfig(
-  UINTN PhyBaseAddr,
-  UINTN PhpBaseAddr,
-  UINT8 PhyMode
-)
-{
-  UINT32 val;
-  DEBUG ((DEBUG_ERROR, "%a reg=%x %x mode = %d\n", __func__, PhyBaseAddr, PhpBaseAddr, PhyMode));
-
-  switch (PhyMode) {
-  case CP_PCIE:
-    MmioWrite32(PhpBaseAddr + 0x0, 0xFFFF1000);
-    MmioWrite32(PhpBaseAddr + 0x4, 0xFFFF4000);
-    MmioWrite32(PhpBaseAddr + 0x8, 0xFFFF0101);
-    MmioWrite32(PhpBaseAddr + 0xc, 0xFFFF0200);
-
-    /* gate_tx_pck_sel length select work for L1SS */
-    MmioWrite32(PhyBaseAddr + 0x74, 0xc0);
-
-    /* PLL KVCO tuning fine */
-    val = MmioRead32(PhyBaseAddr + (0x20 << 2));
-    val &= ~(0x7 << 2);
-    val |= 0x4 << 2;
-    MmioWrite32(PhyBaseAddr + (0x20 << 2), val);
-
-    /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */
-    MmioWrite32(PhyBaseAddr + (0x1b << 2), 0x4c);
-
-    /* Set up su_trim: T3 */
-    MmioWrite32(PhyBaseAddr + (0xa << 2), 0xb0);
-    MmioWrite32(PhyBaseAddr + (0xb << 2), 0x47);
-    MmioWrite32(PhyBaseAddr + (0xd << 2), 0x57);
-
-    break;
-
-  case CP_SATA:
-    MmioWrite32(PhyBaseAddr + 0x38, 0x41);
-    MmioWrite32(PhyBaseAddr + 0x18, 0x8F);
-    MmioWrite32(PhyBaseAddr + 0x7C, 0x50);
-    MmioWrite32(PhyBaseAddr + 0x24, 0x07);
-
-    MmioWrite32(PhpBaseAddr + 0x0, 0xFFFF0129);
-    MmioWrite32(PhpBaseAddr + 0x4, 0xFFFF4000);
-    MmioWrite32(PhpBaseAddr + 0x8, 0xFFFF80c1);
-    MmioWrite32(PhpBaseAddr + 0xc, 0xFFFF0407);
-    break;
-
-  case CP_USB3:
-    /* Set SSC downward spread spectrum */
-    val = MmioRead32(PhyBaseAddr + (0x1f << 2));
-    val &= ~(0x3 << 4);
-    val |= 0x01 << 4;
-    MmioWrite32(PhyBaseAddr + 0x7c, val);
-
-    /* Enable adaptive CTLE for USB3.0 Rx */
-    val = MmioRead32(PhyBaseAddr + (0x0e << 2));
-    val &= ~(0x1 << 0);
-    val |= 0x01;
-    MmioWrite32(PhyBaseAddr + (0x0e << 2), val);
-
-    /* Set PLL KVCO fine tuning signals */
-    val = MmioRead32(PhyBaseAddr + (0x20 << 2));
-    val &= ~(0x7 << 2);
-    val |= 0x2 << 2;
-    MmioWrite32(PhyBaseAddr + (0x20 << 2), val);
-
-    /* Set PLL LPF R1 to su_trim[10:7]=1001 */
-    MmioWrite32(PhyBaseAddr + (0xb << 2), 0x4);
-
-    /* Set PLL input clock divider 1/2 */
-    val = MmioRead32(PhyBaseAddr + (0x5 << 2));
-    val &= ~(0x3 << 6);
-    val |= 0x1 << 6;
-    MmioWrite32(PhyBaseAddr + (0x5 << 2), val);
-
-    /* Set PLL loop divider */
-    MmioWrite32(PhyBaseAddr + (0x11 << 2), 0x32);
-
-    /* Set PLL KVCO to min and set PLL charge pump current to max */
-    MmioWrite32(PhyBaseAddr + (0xa << 2), 0xf0);
-
-    /* Set Rx squelch input filler bandwidth */
-    MmioWrite32(PhyBaseAddr + (0x14 << 2), 0x0d);
-
-    /* Set txcomp_sel[15] to 1b'0 */
-    MmioWrite32(PhpBaseAddr + 0x8, 0x80000000);
-    /* Set txelec_sel[12] to 1b'0 */
-    MmioWrite32(PhpBaseAddr + 0x8, 0x10000000);
-    /* Set usb_mode_set[5:0]=6b'000100 */
-    MmioWrite32(PhpBaseAddr + 0x0, 0x003F0004);
-
-    /* phy_clk_sel to 100MHz */
-    MmioWrite32(PhpBaseAddr + 0x4, 0x60004000);
-    break;
-
-  default:
-    break;
-  }
-
-  return RETURN_SUCCESS;
-}
-
-UINTN
-EFIAPI
-ComboPhyInit(void)
-{
-  UINT32 data;
-  UINT8 *ComPhyMode;
-  UINTN ComPhyDeviceTableSize, Index;
-
-  ComPhyMode = PcdGetPtr (PcdComboPhyMode);
-  if (ComPhyMode == NULL)
-    return RETURN_NOT_FOUND;
-
-  ComPhyDeviceTableSize = PcdGetSize (PcdComboPhyMode);
-
-  /* config phy clock to 100Mhz */
-  HAL_CRU_ClkSetFreq(PLL_PPLL, 100 * 1000000);
-  HAL_CRU_ClkSetFreq(CLK_REF_PIPE_PHY0, 100 * 1000000);
-  HAL_CRU_ClkSetFreq(CLK_REF_PIPE_PHY1, 100 * 1000000);
-  HAL_CRU_ClkSetFreq(CLK_REF_PIPE_PHY2, 100 * 1000000);
-
-  /* Initialize echo combo phy */
-  for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
-    InitComPhyConfig (ComPhyReg[Index][0], ComPhyReg[Index][1], ComPhyMode[Index]);
-    if (ComPhyMode[Index] == CP_SATA) {
-		RegisterNonDiscoverableMmioDevice (
-           NonDiscoverableDeviceTypeAhci,
-           NonDiscoverableDeviceDmaTypeCoherent,
-           NULL,
-           NULL,
-           1,
-           AhciReg[Index], SIZE_4KB);
-    }
-  }
-  /* Initialize SATA */
-  data = MmioRead32(0xfe210000 + 0x118);
-  MmioWrite32(0xfe210000 + 0x118, data | 1 << 22); /* FBSCP */
-  MmioWrite32(0xfe210000 + 0xc, 1); /* HOST_PORTS_IMPL */
-
-  data = MmioRead32(0xfe220000 + 0x118);
-  MmioWrite32(0xfe220000 + 0x118, data | 1 << 22); /* FBSCP */
-  MmioWrite32(0xfe220000 + 0xc, 1); /* HOST_PORTS_IMPL */
-
-  data = MmioRead32(0xfe230000 + 0x118);
-  MmioWrite32(0xfe230000 + 0x118, data | 1 << 22); /* FBSCP */
-  MmioWrite32(0xfe230000 + 0xc, 1); /* HOST_PORTS_IMPL */
-
-  MmioWrite32(0xfd5b0000 + 0x0, 0x07E00440);
-  MmioWrite32(0xfd5b0000 + 0x4, 0x00070002);
-
-  /* reset deassert */
-  MmioWrite32(0xfd7c0000 + 0x0b34, 0x01c00000);
-
-  for (Index = 0; Index < ComPhyDeviceTableSize; Index++)
-    if (ComPhyMode[Index] == CP_USB3)
-      gBS->Stall(2000);
-
-  return RETURN_SUCCESS;
-}
-
-EFI_STATUS
-RK3588InitPeripherals (
-  IN VOID
-  )
-{
-  INT32 i;
-  //UINT32     Data, Bits;
-
-  DEBUG((EFI_D_WARN, "RK3588InitPeripherals: Entry\n"));
-
-  /* make I2C0/I2C1/I2C2/SPI0 out of reset */
-  //Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | PERIPH_RST3_SSP;
-  //MmioWrite32 (CRU_BASE + SC_PERIPH_RSTDIS3, Bits);
-
-  //do {
-  //  Data = MmioRead32 (CRU_BASE + SC_PERIPH_RSTSTAT3);
-  //} while (Data & Bits);
-
-  // UartInit ();
-
-  /* MTCMOS -- Multi-threshold CMOS */
-  // MtcmosInit ();
-
-  /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */
-  //MmioWrite32 (IOCG_084_REG, 0);        /* configure GPIO24 as nopull */
-  //MmioWrite32 (IOMG_080_REG, 0);        /* configure GPIO24 as GPIO */
-  // RK806Init();
-
-  // for (i = 0; i < ARRAY_SIZE(rk806_master); i++)
-  //   RK806RegulatorInit(rk806_master[i]);
-  // for (i = 0; i < ARRAY_SIZE(rk806_slaver); i++)
-  //   RK806RegulatorInit(rk806_slaver[i]);
-
-  ComboPhyInit();
-
-  // GmacIomuxInit();
-
-  /* Enable USB PHYs */
-  Usb2PhyResume (); 
-  UsbDpPhyEnable ();
-  
-  UsbPortPowerEnable ();
-
-  return EFI_SUCCESS;
-}
-
-STATIC
-EFI_STATUS
-CreatePlatformBootOptionFromPath (
-  IN     CHAR16                          *PathStr,
-  IN     CHAR16                          *Description,
-  IN OUT EFI_BOOT_MANAGER_LOAD_OPTION    *BootOption
-  )
-{
-  EFI_STATUS                   Status;
-  EFI_DEVICE_PATH              *DevicePath;
-
-  DevicePath = (EFI_DEVICE_PATH *)ConvertTextToDevicePath (PathStr);
-  ASSERT (DevicePath != NULL);
-  Status = EfiBootManagerInitializeLoadOption (
-             BootOption,
-             LoadOptionNumberUnassigned,
-             LoadOptionTypeBoot,
-             LOAD_OPTION_ACTIVE,
-             Description,
-             DevicePath,
-             NULL,
-             0
-             );
-  FreePool (DevicePath);
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-CreatePlatformBootOptionFromGuid (
-  IN     EFI_GUID                        *FileGuid,
-  IN     CHAR16                          *Description,
-  IN OUT EFI_BOOT_MANAGER_LOAD_OPTION    *BootOption
-  )
-{
-  EFI_STATUS                             Status;
-  EFI_DEVICE_PATH                        *DevicePath;
-  EFI_DEVICE_PATH                        *TempDevicePath;
-  EFI_LOADED_IMAGE_PROTOCOL              *LoadedImage;
-  MEDIA_FW_VOL_FILEPATH_DEVICE_PATH      FileNode;
-
-  Status = gBS->HandleProtocol (
-                  gImageHandle,
-                  &gEfiLoadedImageProtocolGuid,
-                  (VOID **) &LoadedImage
-                  );
-  ASSERT_EFI_ERROR (Status);
-  EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
-  TempDevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
-  ASSERT (TempDevicePath != NULL);
-  DevicePath = AppendDevicePathNode (
-                 TempDevicePath,
-                 (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
-                 );
-  ASSERT (DevicePath != NULL);
-  Status = EfiBootManagerInitializeLoadOption (
-             BootOption,
-             LoadOptionNumberUnassigned,
-             LoadOptionTypeBoot,
-             LOAD_OPTION_ACTIVE,
-             Description,
-             DevicePath,
-             NULL,
-             0
-             );
-  FreePool (DevicePath);
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-GetPlatformBootOptionsAndKeys (
-  OUT UINTN                              *BootCount,
-  OUT EFI_BOOT_MANAGER_LOAD_OPTION       **BootOptions,
-  OUT EFI_INPUT_KEY                      **BootKeys
-  )
-{
-  EFI_GUID                               *FileGuid;
-  CHAR16                                 *PathStr;
-  EFI_STATUS                             Status;
-  UINTN                                  Size;
-
-  Size = sizeof (EFI_BOOT_MANAGER_LOAD_OPTION) * HIKEY_BOOT_OPTION_NUM;
-  *BootOptions = (EFI_BOOT_MANAGER_LOAD_OPTION *)AllocateZeroPool (Size);
-  if (*BootOptions == NULL) {
-    DEBUG ((DEBUG_ERROR, "Failed to allocate memory for BootOptions\n"));
-    return EFI_OUT_OF_RESOURCES;
-  }
-  Size = sizeof (EFI_INPUT_KEY) * HIKEY_BOOT_OPTION_NUM;
-  *BootKeys = (EFI_INPUT_KEY *)AllocateZeroPool (Size);
-  if (*BootKeys == NULL) {
-    DEBUG ((DEBUG_ERROR, "Failed to allocate memory for BootKeys\n"));
-    Status = EFI_OUT_OF_RESOURCES;
-    goto Error;
-  }
-
-  PathStr = (CHAR16 *)PcdGetPtr (PcdSdBootDevicePath);
-  ASSERT (PathStr != NULL);
-  Status = CreatePlatformBootOptionFromPath (
-             PathStr,
-             L"Boot from SD",
-             &(*BootOptions)[0]
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  PathStr = (CHAR16 *)PcdGetPtr (PcdAndroidBootDevicePath);
-  ASSERT (PathStr != NULL);
-  Status = CreatePlatformBootOptionFromPath (
-             PathStr,
-             L"Grub",
-             &(*BootOptions)[1]
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  FileGuid = PcdGetPtr (PcdAndroidBootFile);
-  ASSERT (FileGuid != NULL);
-  Status = CreatePlatformBootOptionFromGuid (
-             FileGuid,
-             L"Android Boot",
-             &(*BootOptions)[2]
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  FileGuid = PcdGetPtr (PcdAndroidFastbootFile);
-  ASSERT (FileGuid != NULL);
-  Status = CreatePlatformBootOptionFromGuid (
-             FileGuid,
-             L"Android Fastboot",
-             &(*BootOptions)[3]
-             );
-  ASSERT_EFI_ERROR (Status);
-  (*BootKeys)[3].ScanCode = SCAN_NULL;
-  (*BootKeys)[3].UnicodeChar = 'f';
-
-  *BootCount = 4;
-
-  return EFI_SUCCESS;
-Error:
-  FreePool (*BootOptions);
-  return Status;
-}
-
-PLATFORM_BOOT_MANAGER_PROTOCOL mPlatformBootManager = {
-  GetPlatformBootOptionsAndKeys
-};
-
-EFI_STATUS
-EFIAPI
-VirtualKeyboardRegister (
-  IN VOID
-  )
-{
-  EFI_STATUS           Status;
-
-  Status = gBS->LocateProtocol (
-                  &gEmbeddedGpioProtocolGuid,
-                  NULL,
-                  (VOID **) &mGpio
-                  );
-  if (EFI_ERROR (Status)) {
-    return Status;
-  }
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-EFIAPI
-VirtualKeyboardReset (
-  IN VOID
-  )
-{
-  EFI_STATUS           Status;
-
-  if (mGpio == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-  Status = mGpio->Set (mGpio, DETECT_J15_FASTBOOT, GPIO_MODE_INPUT);
-  return Status;
-}
-
-BOOLEAN
-EFIAPI
-VirtualKeyboardQuery (
-  IN VIRTUAL_KBD_KEY             *VirtualKey
-  )
-{
-  EFI_STATUS           Status;
-  UINTN                Value = 0;
-
-  if ((VirtualKey == NULL) || (mGpio == NULL)) {
-    return FALSE;
-  }
-  if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) {
-    goto Done;
-  } else {
-    Status = mGpio->Get (mGpio, DETECT_J15_FASTBOOT, &Value);
-    if (EFI_ERROR (Status) || (Value != 0)) {
-      return FALSE;
-    }
-  }
-Done:
-  VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE;
-  VirtualKey->Key.ScanCode = SCAN_NULL;
-  VirtualKey->Key.UnicodeChar = L'f';
-  return TRUE;
-}
-
-EFI_STATUS
-EFIAPI
-VirtualKeyboardClear (
-  IN VIRTUAL_KBD_KEY            *VirtualKey
-  )
-{
-  if (VirtualKey == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-  if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) {
-    MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE);
-    WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4);
-  }
-  return EFI_SUCCESS;
-}
-
-PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = {
-  VirtualKeyboardRegister,
-  VirtualKeyboardReset,
-  VirtualKeyboardQuery,
-  VirtualKeyboardClear
-};
-
-STATIC  EFI_STATUS EFIAPI AppendArgs (
-  IN CHAR16            *Args,
-  IN UINTN              Size
-  )
-{
-	CHAR16 *newArgs =   (CHAR16 *)PcdGetPtr (PcdKernelBootArg);
-    UINTN srcSize, i, bootArgSize;
-
-    for (srcSize = 0; srcSize < Size / 2; srcSize++) {
-        if (!Args[srcSize])
-			break;
-    }
-
-    for (bootArgSize = 0; bootArgSize < Size / 2; bootArgSize++) {
-        if (!newArgs[bootArgSize])
-			break;
-    }
-
-	if (bootArgSize * 2 + srcSize * 2 < Size)
-	    for (i = 0; i < bootArgSize; i++)
-            Args[i] = newArgs[i];
-
-    return 0;
-}
-
-ANDROID_BOOTIMG_PROTOCOL mAndroidBootImageManager = {
-	  AppendArgs,
-	  NULL
-};
-
-STATIC CONST EFI_GUID mAcpiTableFile = {
-  0x7E374E25, 0x8E01, 0x4FEE, { 0x87, 0xf2, 0x39, 0x0C, 0x23, 0xC6, 0x06, 0xCD }
-};
-
-STATIC VOID SetFlashAttributeToUncache(VOID)
-{
-  EFI_STATUS Status;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR desp = {0};
-
-  Status = gDS->AddMemorySpace (
-                     EfiGcdMemoryTypeMemoryMappedIo,
-                     PcdGet64(FspiBaseAddr),
-                     SIZE_64KB,
-                     EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
-                     );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "RTC: Failed to add memory space Status = %r\n", Status));
-    return;
-  }
-
-  Status = gDS->GetMemorySpaceDescriptor(PcdGet64(FspiBaseAddr),&desp);
-  DEBUG ((DEBUG_ERROR, "%a: GetMemorySpaceDescriptor status = %x\n", __FUNCTION__, Status));
-  if(EFI_ERROR(Status)){
-    return;
-  }
-
-  Status = gDS->SetMemorySpaceAttributes (
-                     PcdGet64(FspiBaseAddr),
-                     SIZE_64KB,
-                     EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
-                     );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes Status = %x\n",__FUNCTION__, Status));
-  }
-
-  Status = gDS->AddMemorySpace (
-                     EfiGcdMemoryTypeMemoryMappedIo,
-                     PcdGet64(CruBaseAddr),
-                     SIZE_64KB,
-                     EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
-                     );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "RTC: Failed to add memory space Status = %r\n", Status));
-    return;
-  }
-
-  Status = gDS->GetMemorySpaceDescriptor(PcdGet64(CruBaseAddr),&desp);
-    DEBUG ((DEBUG_ERROR, "%a: GetMemorySpaceDescriptor status = %x\n", __FUNCTION__, Status));
-  if(EFI_ERROR(Status)){
-    return;
-  }
-
-  Status = gDS->SetMemorySpaceAttributes (
-                     PcdGet64(CruBaseAddr),
-                     SIZE_64KB,
-                     EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
-                     );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes Status = %x\n",__FUNCTION__, Status));
-  }
-
-}
-
-EFI_STATUS
-EFIAPI
-RK3588EntryPoint (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_STATUS            Status;
-
-  /* Update CPU speed */
-  // looks like the BL31 firmware in rk3588 isn't able to change frequency anymore
-  // You can get current CPU freq with it, and even set a new freq without error
-  // but it won't take effect.
-  // BoardInitSetCpuSpeed();
-  
-  Status = RK3588InitPeripherals ();
-  if (EFI_ERROR (Status)) {
-    return Status;
-  }
-
-  SetFlashAttributeToUncache();
-
-  if(PcdGetBool (AcpiEnable)) {
-    LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL);
-  }
-
-  Status = gBS->InstallProtocolInterface (
-                  &ImageHandle,
-                  &gPlatformVirtualKeyboardProtocolGuid,
-                  EFI_NATIVE_INTERFACE,
-                  &mVirtualKeyboard
-                  );
-  if (EFI_ERROR (Status)) {
-    return Status;
-  }
-
-  Status = gBS->InstallProtocolInterface (
-                  &ImageHandle,
-                  &gPlatformBootManagerProtocolGuid,
-                  EFI_NATIVE_INTERFACE,
-                  &mPlatformBootManager
-                  );
-
-  if (EFI_ERROR (Status)) {
-    return Status;
-  }
-
-  Status = gBS->InstallProtocolInterface (
-                  &ImageHandle,
-                  &gAndroidBootImgProtocolGuid,
-                  EFI_NATIVE_INTERFACE,
-                  &mAndroidBootImageManager
-                  );
-
-  return Status;
-}

edk2-platforms/Platform/OrangePi/OrangePi5/Drivers/RK3588Dxe_opi5/RK3588Dxe.h

@@ -1,20 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2018, Linaro Ltd. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#ifndef __HIKEYDXE_H__
-#define __HIKEYDXE_H__
-
-#define DETECT_J15_FASTBOOT              24   // GPIO3_0
-
-#define ADB_REBOOT_ADDRESS               0x05F01000
-#define ADB_REBOOT_BOOTLOADER            0x77665500
-#define ADB_REBOOT_NONE                  0x77665501
-
-#define HIKEY_BOOT_OPTION_NUM            4
-
-#endif /* __HIKEYDXE_H__ */

edk2-platforms/Platform/OrangePi/OrangePi5/Drivers/RK3588Dxe_opi5/RK3588Dxe.inf

@@ -1,67 +0,0 @@
-#
-#  Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
-#  Copyright (c) 2018, Linaro Ltd. All rights reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-
-[Defines]
-  INF_VERSION                    = 0x0001001a
-  BASE_NAME                      = RK3588Dxe
-  FILE_GUID                      = f6c64348-45ec-11ec-9726-f42a7dcb925d
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  ENTRY_POINT                    = RK3588EntryPoint
-
-[Sources.common]
-  RK3588Dxe.c
-
-[Packages]
-  ArmPkg/ArmPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  MdePkg/MdePkg.dec
-  Platform/Rockchip/RK3588/RK3588.dec
-  Silicon/Rockchip/RockchipPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  Platform/OrangePi/OrangePi5/OrangePi5.dec
-
-[LibraryClasses]
-  CacheMaintenanceLib
-  DebugLib
-  AcpiLib
-  IoLib
-  UefiBootManagerLib
-  UefiLib
-  UefiDriverEntryPoint
-  SpiLib
-  RK806
-  CruLib
-  ArmLib
-  NonDiscoverableDeviceRegistrationLib
-
-[Protocols]
-  gEfiDevicePathFromTextProtocolGuid
-  gEfiLoadedImageProtocolGuid
-  gEmbeddedGpioProtocolGuid
-  gPlatformBootManagerProtocolGuid
-  gPlatformVirtualKeyboardProtocolGuid
-  gAndroidBootImgProtocolGuid
-  gEfiCpuArchProtocolGuid
-
-[Pcd]
-  gRK3588TokenSpaceGuid.PcdAndroidBootDevicePath
-  gRK3588TokenSpaceGuid.PcdAndroidBootFile
-  gRK3588TokenSpaceGuid.PcdAndroidFastbootFile
-  gRK3588TokenSpaceGuid.PcdSdBootDevicePath
-  gRK3588TokenSpaceGuid.AcpiEnable
-  gRockchipTokenSpaceGuid.CruBaseAddr
-  gRockchipTokenSpaceGuid.FspiBaseAddr
-  gRK3588TokenSpaceGuid.PcdKernelBootArg
-  gRockchipTokenSpaceGuid.PcdComboPhyMode
-
-[Guids]
-  gEfiEndOfDxeEventGroupGuid
-
-[Depex]
-  TRUE

edk2-platforms/Platform/OrangePi/OrangePi5/Include/Library/Rk3588Mem.h

@@ -1,28 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, Andrey Warkentin <andrey.warkentin@gmail.com>
- *  Copyright (c) 2019, Pete Batard <pete@akeo.ie>
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#ifndef RK3588_MEM_H__
-#define RK3588_MEM_H__
-
-#define RK3588_MEM_UNMAPPED_REGION 0
-#define RK3588_MEM_BASIC_REGION    1
-#define RK3588_MEM_RUNTIME_REGION  2
-#define RK3588_MEM_RESERVED_REGION 3
-
-typedef struct {
-  CONST CHAR16*                 Name;
-  UINTN                         Type;
-} RK3588_MEMORY_REGION_INFO;
-
-VOID
-Rk3588PlatformGetVirtualMemoryInfo (
-  IN RK3588_MEMORY_REGION_INFO** MemoryInfo
-  );
-
-#endif /* RK3588_MEM_H__ */

edk2-platforms/Platform/OrangePi/OrangePi5/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -9,8 +9,41 @@
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/GpioLib.h>
+#include <Library/RK806.h>
 #include <Soc.h>
 
+static struct regulator_init_data rk806_init_data[] = {
+  /* Master PMIC */
+
+  /* TODO: Figure out the correct voltages
+
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK2, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1100000),
+
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 900000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 850000),
+
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  */
+
+  /* No dual PMICs on this platform */
+};
+
 void DebugPrintHex(void *buf, UINT32 width, UINT32 len)
 {
   UINT32 i,j;
@@ -73,6 +106,20 @@ Rk806SpiIomux(void)
   MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
+VOID
+EFIAPI
+Rk806Configure(
+  VOID
+)
+{
+  UINTN RegCfgIndex;
+
+  RK806Init();
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
+    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+}
+
 void
 EFIAPI
 NorFspiIomux(void)

edk2-platforms/Platform/OrangePi/OrangePi5/Library/RockchipPlatformLib/RockchipPlatformLib.inf

@@ -11,6 +11,7 @@
   MODULE_TYPE                    = BASE
   VERSION_STRING                 = 1.0
   LIBRARY_CLASS                  = RockchipPlatformLib
+  RKPLATLIB_COMMON_DIR           = Silicon/Rockchip/RK3588/Library/RockchipPlatformLibCommon
 
 [Packages]
   EmbeddedPkg/EmbeddedPkg.dec
@@ -19,7 +20,6 @@
   Platform/Rockchip/RK3588/RK3588.dec
   Silicon/Rockchip/RK3588/RK3588.dec
   Silicon/Rockchip/RockchipPkg.dec
-  Platform/OrangePi/OrangePi5/OrangePi5.dec
 
 [LibraryClasses]
   ArmLib
@@ -32,8 +32,8 @@
 
 [Sources.common]
   RockchipPlatformLib.c
-  RK3588CruLib.c
-  RockchipSdhci.c
+  $(RKPLATLIB_COMMON_DIR)/RK3588CruLib.c
+  $(RKPLATLIB_COMMON_DIR)/RockchipSdhci.c
 
 [Sources.AARCH64]
 

edk2-platforms/Platform/OrangePi/OrangePi5/OrangePi5.dec

@@ -1,35 +0,0 @@
-#
-#  Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
-  DEC_SPECIFICATION              = 0x0001001a
-  PACKAGE_NAME                   = OrangePi5
-  PACKAGE_GUID                   = 7eb1de03-3910-4d1d-84ce-c17b53636b9a
-  PACKAGE_VERSION                = 1.0
-
-[Includes.common]
-  Include                        # Root include for the package
-
-[Guids.common]
-  gROCK5BTokenSpaceGuid          = { 0x99a14446, 0xaad7, 0xe460, { 0xb4, 0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
-  gMaskromFileGuid               = { 0x6987437F, 0xED34, 0x44db, { 0xae, 0x97, 0x1f, 0xa5, 0xe4, 0xed, 0x21, 0x16 } }
-
-[Protocols]
-
-[Guids]
-
-[PcdsFixedAtBuild.common]
-  gROCK5BTokenSpaceGuid.PcdSerialPortSendDelay|500000|UINT32|0x01000010
-  gROCK5BTokenSpaceGuid.PcdUartClkInHz|24000000|UINT32|0x0100001F
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxBase|0x0010f000|UINT64|0x00001000
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSize|0x100|UINT32|0x00001001
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSmcId|0x82000010|UINT32|0x00010002

edk2-platforms/Platform/OrangePi/OrangePi5/OrangePi5.dsc

@@ -85,24 +85,26 @@
   UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
   LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
 
+  # OTP Library
+  OtpLib|Silicon/Rockchip/RK3588/Library/OtpLib/OtpLib.inf
 
   #
   # Custom libraries
   #
   RockchipPlatformLib|Platform/OrangePi/OrangePi5/Library/RockchipPlatformLib/RockchipPlatformLib.inf
-  ResetSystemLib|Platform/Radxa/ROCK5B/Library/ResetSystemLib/ResetSystemLib.inf
-  PlatformBootManagerLib|Platform/Radxa/ROCK5B/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
-  SerialPortLib|Platform/Radxa/ROCK5B/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
-  GpioLib|Platform/Radxa/ROCK5B/Library/GpioLib/GpioLib.inf
+  ResetSystemLib|Silicon/Rockchip/Library/ResetSystemLib/ResetSystemLib.inf
+  PlatformBootManagerLib|Silicon/Rockchip/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
+  GpioLib|Silicon/Rockchip/RK3588/Library/GpioLib/GpioLib.inf
   # SCMI Mailbox Transport Layer
-  ArmMtlLib|Platform/Radxa/ROCK5B/Library/RkMtlLib/RkMtlLib.inf
+  ArmMtlLib|Silicon/Rockchip/Library/RkMtlLib/RkMtlLib.inf
 
 [LibraryClasses.common.SEC]
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
   ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
   HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
   MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
-  MemoryInitPeiLib|Platform/Radxa/ROCK5B/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf
+  MemoryInitPeiLib|Silicon/Rockchip/RK3588/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
   PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
 
@@ -137,6 +139,13 @@
   gArmPlatformTokenSpaceGuid.PcdCoreCount|8
   gArmPlatformTokenSpaceGuid.PcdClusterCount|1
 
+  # SMBIOS platform config
+  gRockchipTokenSpaceGuid.PcdPlatformName|"Orange Pi 5"
+  gRockchipTokenSpaceGuid.PcdPlatformVendorName|"Orange Pi"
+  gRockchipTokenSpaceGuid.PcdFamilyName|"Orange Pi 5"
+  gRockchipTokenSpaceGuid.PcdProductUrl|"http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-5.html"
+  gRockchipTokenSpaceGuid.PcdMemoryVendorName|"TBD"
+
   # I2C
   gRockchipTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x51 }
   gRockchipTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x2 }
@@ -151,6 +160,8 @@
   DEFINE SERIAL_BASE = 0xFEB50000 # UART2
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE)
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|1500000
+  gHisiTokenSpaceGuid.PcdSerialPortSendDelay|500000
+  gHisiTokenSpaceGuid.PcdUartClkInHz|24000000
 
   ## SPI - SPI2 for test
   gRockchipTokenSpaceGuid.SpiTestBaseAddr|0xFEB20000
@@ -378,7 +389,7 @@
   Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.inf
   Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
 
-  Platform/Rockchip/RK3588/LogoDxe/LogoDxe.inf
+  Platform/OrangePi/Drivers/LogoDxe/LogoDxe.inf
 
   #
   # SCMI Driver
@@ -422,7 +433,8 @@
   #EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
   #Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   Silicon/Rockchip/Drivers/MmcDxe/MmcDxe.inf
-  #Silicon/Rockchip/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+  # sdcard is dwemmc, sdhci is for eMMC.
+  Silicon/Rockchip/RK3588/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   Silicon/Rockchip/Drivers/SdhciHostDxe/SdhciHostDxe.inf
 
   #
@@ -447,7 +459,7 @@
   #
   # SMBIOS Support
   #
-  Platform/OrangePi/OrangePi5/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+  Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
   
   #
@@ -574,8 +586,8 @@
   #
   # Custom Applications and drivers
   #
-  Platform/Radxa/ROCK5B/Applications/maskrom/maskrom.inf
+  Silicon/Rockchip/Applications/MaskromReset/maskrom.inf
 
   # Platform drivers
-  Platform/OrangePi/OrangePi5/Drivers/RK3588Dxe_opi5/RK3588Dxe.inf
+  Silicon/Rockchip/RK3588/Drivers/RK3588Dxe/RK3588Dxe.inf
 

edk2-platforms/Platform/OrangePi/OrangePi5/OrangePi5.fdf

@@ -167,14 +167,14 @@ READ_LOCK_STATUS   = TRUE
   #INF Silicon/Rockchip/Library/DisplayLib/AnalogixDpLib.inf
   INF Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.inf
   INF Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
-  INF Platform/Rockchip/RK3588/LogoDxe/LogoDxe.inf
+  INF Platform/OrangePi/Drivers/LogoDxe/LogoDxe.inf
 
-  INF Platform/OrangePi/OrangePi5/Drivers/RK3588Dxe_opi5/RK3588Dxe.inf
+  INF Silicon/Rockchip/RK3588/Drivers/RK3588Dxe/RK3588Dxe.inf
 
   #
   # SMBIOS Support
   #
-  INF Platform/OrangePi/OrangePi5/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+  INF Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
   INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 
   #
@@ -278,7 +278,8 @@ READ_LOCK_STATUS   = TRUE
   #
   # INF Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   INF Silicon/Rockchip/Drivers/MmcDxe/MmcDxe.inf
-  # INF Silicon/Rockchip/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+  # sdcard is dwemmc, sdhci is for eMMC.
+  INF Silicon/Rockchip/RK3588/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   
   # Needs to be disabled if booting from eMMC
   # INF Silicon/Rockchip/Drivers/SdhciHostDxe/SdhciHostDxe.inf
@@ -304,7 +305,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
   # Custom
-  INF Platform/Radxa/ROCK5B/Applications/maskrom/maskrom.inf
+  INF Silicon/Rockchip/Applications/MaskromReset/maskrom.inf
   
   # SCMI Driver
   INF ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/AcpiTables.h

@@ -1,61 +0,0 @@
-/** @file
- *
- *  RPi defines for constructing ACPI tables
- *
- *  Copyright (c) 2020, Pete Batard <pete@akeo.ie>
- *  Copyright (c) 2019, ARM Ltd. All rights reserved.
- *  Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
- *  Copyright (c) Microsoft Corporation. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#ifndef __ACPITABLES_H__
-#define __ACPITABLES_H__
-
-#include <IndustryStandard/Acpi.h>
-
-#define EFI_ACPI_OEM_ID                       {'R','K','C','P',' ',' '}
-
-#define EFI_ACPI_OEM_TABLE_ID                 SIGNATURE_64 ('R','K','3','5','8','8',' ',' ')
-
-#define EFI_ACPI_OEM_REVISION                 0x00000000
-#define EFI_ACPI_CREATOR_ID                   SIGNATURE_32 ('E','D','K','2')
-#define EFI_ACPI_CREATOR_REVISION             0x00000000
-#define EFI_ACPI_VENDOR_ID                    SIGNATURE_32 ('R','K','C','P')
-
-// A macro to initialise the common header part of EFI ACPI tables as defined by
-// EFI_ACPI_DESCRIPTION_HEADER structure.
-#define ACPI_HEADER(Signature, Type, Revision) {                  \
-    Signature,                      /* UINT32  Signature */       \
-    sizeof (Type),                  /* UINT32  Length */          \
-    Revision,                       /* UINT8   Revision */        \
-    0,                              /* UINT8   Checksum */        \
-    EFI_ACPI_OEM_ID,                /* UINT8   OemId[6] */        \
-    EFI_ACPI_OEM_TABLE_ID,          /* UINT64  OemTableId */      \
-    EFI_ACPI_OEM_REVISION,          /* UINT32  OemRevision */     \
-    EFI_ACPI_CREATOR_ID,            /* UINT32  CreatorId */       \
-    EFI_ACPI_CREATOR_REVISION       /* UINT32  CreatorRevision */ \
-  }
-
-#define EFI_ACPI_6_0_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
-  {                                                                           \
-    EFI_ACPI_6_0_GICR,                                                        \
-    sizeof (EFI_ACPI_6_0_GICR_STRUCTURE),                                     \
-    0,                                                                        \
-    RedisRegionAddr,                                                          \
-    RedisDiscLength                                                           \
-  }
-
-#define EFI_ACPI_6_0_GIC_ITS_FRAME_INIT(Id, PhysAddress)                      \
-  {                                                                           \
-    EFI_ACPI_6_0_GIC_ITS,                                                     \
-    sizeof (EFI_ACPI_6_0_GIC_ITS_STRUCTURE),                                  \
-    0,                                                                        \
-    Id,                                                                       \
-    PhysAddress,                                                              \
-    0                                                                         \
-  }
-
-#endif // __ACPITABLES_H__

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/AcpiTables.inf

@@ -15,6 +15,7 @@
   FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD
   MODULE_TYPE                    = USER_DEFINED
   VERSION_STRING                 = 1.0
+  RK_COMMON_ACPI_DIR             = Silicon/Rockchip/RK3588/AcpiTables
 
 #
 # The following information is for reference only and not required by the build tools.
@@ -23,15 +24,14 @@
 #
 
 [Sources]
-  AcpiTables.h
-  Madt.aslc
-  Fadt.aslc
-  Gtdt.aslc
   Dsdt.asl
-  Spcr.aslc
-  Mcfg.aslc
-  RK3588PcieIort.aslc
-  Dbg2.aslc
+  $(RK_COMMON_ACPI_DIR)/Madt.aslc
+  $(RK_COMMON_ACPI_DIR)/Fadt.aslc
+  $(RK_COMMON_ACPI_DIR)/Gtdt.aslc
+  $(RK_COMMON_ACPI_DIR)/Spcr.aslc
+  $(RK_COMMON_ACPI_DIR)/Mcfg.aslc
+  $(RK_COMMON_ACPI_DIR)/RK3588PcieIort.aslc
+  $(RK_COMMON_ACPI_DIR)/Dbg2.aslc
 
 [Packages]
   ArmPkg/ArmPkg.dec

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Dbg2.aslc

@@ -1,69 +0,0 @@
-/** @file
-*  Debug Port Table (DBG2)
-*
-*  Copyright (c) 2021, Jared McNeill <jmcneill@invisible.ca>
-*  Copyright (c) 2020 Linaro Ltd. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/DebugPort2Table.h>
-#include <Library/AcpiLib.h>
-#include <Library/PcdLib.h>
-
-#include "AcpiTables.h"
-
-#pragma pack(1)
-
-#define UART_STR { '\\', '_', 'S', 'B', '.', 'U', 'A', 'R', '2', 0x00 }
-
-typedef struct {
-  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
-  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
-  UINT32                                        AddressSize;
-  UINT8                                         NameSpaceString[10];
-} DBG2_DEBUG_DEVICE_INFORMATION;
-
-typedef struct {
-  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
-  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo;
-} DBG2_TABLE;
-
-
-STATIC DBG2_TABLE Dbg2 = {
-  {
-    ACPI_HEADER (
-      EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
-      DBG2_TABLE,
-      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
-    ),
-    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
-    1                                      /* NumberOfDebugPorts */
-  },
-  {
-    {
-      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
-      sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
-      1,                                   /* NumberofGenericAddressRegisters */
-      10,                                  /* NameSpaceStringLength */
-      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
-      0,                                   /* OemDataLength */
-      0,                                   /* OemDataOffset */
-      EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
-      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
-      {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
-      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
-      OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
-    },
-    ARM_GAS32 (FixedPcdGet64(PcdSerialRegisterBase)),  /* BaseAddressRegister */
-    0x1000,                                            /* AddressSize */
-    UART_STR,                                          /* NameSpaceString */
-  }
-};
-
-#pragma pack()
-
-// Reference the table being generated to prevent the optimizer from removing
-// the data structure from the executable
-VOID* CONST ReferenceAcpiTable = &Dbg2;

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Dsdt.asl

@@ -17,84 +17,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
 {
   Scope (\_SB_)
   {
-    Device (CPU0)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x0)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-    Device (CPU1)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x1)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU2)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x2)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU3)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x3)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU4)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x4)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU5)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x5)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU6)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x6)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
-
-    Device (CPU7)
-    {
-      Name (_HID, "ACPI0007")
-      Name (_UID, 0x7)
-      Method (_STA)
-      {
-        Return (0xf)
-      }
-    }
+    include ("Cpu.asl")
 
     include ("Pcie.asl")
     // include ("Sata.asl")
@@ -109,6 +32,8 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
     // won't work on Windows, will trigger bugcheck by usbehci
     // include ("Usb2.asl")
 
-    include ("Usb3.asl")
+    include ("Usb3Host0.asl")
+    include ("Usb3Host1.asl")
+    include ("Usb3Host2.asl")
   }
 }

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Emmc.asl

@@ -1,76 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, ARM Limited. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-
-  Device (SDC3) {
-    Name (_HID, "PRP0001")
-    Name (_UID, 3)
-    Name (_CCA, 0)
-
-    Method (_CRS, 0x0, Serialized) {
-      Name (RBUF, ResourceTemplate() {
-        Memory32Fixed (ReadWrite, 0xfe2e0000, 0x1000)
-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 237 }
-      })
-      Return (RBUF)
-    }
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package (2) { "compatible", "rockchip,rk3588-dwcmshc" },
-        Package () { "max-frequency", 200000000 },
-        Package () { "bus-width", 8 },
-        Package () { "no-sd", 0x1 },
-        Package () { "no-sdio", 0x1  },
-        Package () { "mmc-hs400-1_8v", 0x1  },
-        Package () { "mmc-hs400-enhanced-strobe", 0x1  },
-        Package () { "non-removable", 0x1  },
-      }
-    })
-
-    OperationRegion(EMMC, SystemMemory, 0xFD7C0434, 0x4)
-      Field(EMMC, DWordAcc, Lock, WriteAsZeros) {
-      PLLE, 32,
-    }
-
-    Method(SCLK, 1, Serialized) {
-      If (Arg0 <= 400000)
-      {
-        Store (0xFF00BF00, PLLE)
-      }
-      ElseIF (Arg0 <= 50000000)
-      {
-        Store (0xFF008000, PLLE)
-      }
-      Else
-      {
-        Store (0xFF000600, PLLE)
-      }
-    }
-
-    Method(_PS3) {
-
-    }
-
-    Method(_PS2) {
-      Store (0xFF00BF00, PLLE)
-    }
-
-    Method(_PS1) {
-      Store (0xFF008000, PLLE)
-    }
-
-    Method(_PS0) {
-      Store (0xFF000600, PLLE)
-    }
-
-    Method(_PSC) {
-      Return(0x01)
-    }
-  }

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Fadt.aslc

@@ -1,96 +0,0 @@
-/** @file
- *
- *  Fixed ACPI Description Table (FADT)
- *
- *  Copyright (c) 2019, Pete Batard <pete@akeo.ie>
- *  Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
- *  Copyright (c) Microsoft Corporation. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#include <IndustryStandard/Acpi.h>
-#include <Library/AcpiLib.h>
-#include <Library/PcdLib.h>
-
-#include "AcpiTables.h"
-
-/*
- * Windows 10 on the Raspberry Pi 3 requires a specific OEM Id for FADT.
- * We replace the one that was defined in "AcpiTables.h", so that it is
- * picked by the ACPI_HEADER () macro.
- */
-#if (RPI_MODEL == 3)
-#undef  EFI_ACPI_OEM_ID
-#define EFI_ACPI_OEM_ID         {'R','O','C','K',' ',' '}
-#endif
-
-EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
-  ACPI_HEADER (
-    EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
-    EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE,
-    EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
-  ),
-  0,                                                                        // UINT32     FirmwareCtrl
-  0,                                                                        // UINT32     Dsdt
-  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
-  EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC,                                     // UINT8      PreferredPmProfile
-  0,                                                                        // UINT16     SciInt
-  0,                                                                        // UINT32     SmiCmd
-  0,                                                                        // UINT8      AcpiEnable
-  0,                                                                        // UINT8      AcpiDisable
-  0,                                                                        // UINT8      S4BiosReq
-  0,                                                                        // UINT8      PstateCnt
-  0,                                                                        // UINT32     Pm1aEvtBlk
-  0,                                                                        // UINT32     Pm1bEvtBlk
-  0,                                                                        // UINT32     Pm1aCntBlk
-  0,                                                                        // UINT32     Pm1bCntBlk
-  0,                                                                        // UINT32     Pm2CntBlk
-  0,                                                                        // UINT32     PmTmrBlk
-  0,                                                                        // UINT32     Gpe0Blk
-  0,                                                                        // UINT32     Gpe1Blk
-  0,                                                                        // UINT8      Pm1EvtLen
-  0,                                                                        // UINT8      Pm1CntLen
-  0,                                                                        // UINT8      Pm2CntLen
-  0,                                                                        // UINT8      PmTmrLen
-  0,                                                                        // UINT8      Gpe0BlkLen
-  0,                                                                        // UINT8      Gpe1BlkLen
-  0,                                                                        // UINT8      Gpe1Base
-  0,                                                                        // UINT8      CstCnt
-  0,                                                                        // UINT16     PLvl2Lat
-  0,                                                                        // UINT16     PLvl3Lat
-  0,                                                                        // UINT16     FlushSize
-  0,                                                                        // UINT16     FlushStride
-  0,                                                                        // UINT8      DutyOffset
-  0,                                                                        // UINT8      DutyWidth
-  0,                                                                        // UINT8      DayAlrm
-  0,                                                                        // UINT8      MonAlrm
-  0,                                                                        // UINT8      Century
-  EFI_ACPI_RESERVED_WORD,                                                   // UINT16     IaPcBootArch (Reserved on ARM)
-  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved1
-  EFI_ACPI_6_3_WBINVD | EFI_ACPI_6_3_SLP_BUTTON |                           // UINT32     Flags
-  EFI_ACPI_6_3_HW_REDUCED_ACPI,
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  ResetReg
-  0,                                                                        // UINT8      ResetValue
-  EFI_ACPI_6_3_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
-  EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
-  0,                                                                        // UINT64     XFirmwareCtrl
-  0,                                                                        // UINT64     XDsdt
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk
-  NULL_GAS,                                                                 // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  SleepControlReg
-  NULL_GAS                                                                  // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  SleepStatusReg
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Fadt;

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Gmac.asl

@@ -1,214 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, ARM Limited. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-  Device (MAC0) {
-    Name (_HID, "PRP0001")
-    Name (_UID, 0)
-    Name (_CCA, 0)
-
-    Method (_CRS, 0x0, Serialized) {
-      Name (RBUF, ResourceTemplate() {
-        Memory32Fixed (ReadWrite, 0xfe1b0000, 0x10000)
-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 259, 258 }
-      })
-      Return (RBUF)
-    }
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package (2) { "interrupt-names", Package () { "macirq", "eth_wake_irq" }, },
-        Package (2) { "tx_delay", 67 },
-        Package (2) { "compatible", package () { "rockchip,rk3588-gmac", "snps,dwmac-4.20a" }, },
-        Package (2) { "phy-mode", "rgmii-rxid" },
-        Package (2) { "clock_in_out", "output" },
-        Package (2) { "csr-freq", 150000000 },
-        Package (2) { "snps,reset-delays-us", package () { 0, 20000, 100000 } },
-        Package (2) { "phy-handle", \_SB.MAC0.MDIO.PHY0 },
-        Package (2) { "snps,axi-config", \_SB.MAC0.AST0 },
-        Package (2) { "snps,mtl-rx-config", \_SB.MAC0.MRX0 },
-        Package (2) { "snps,mtl-tx-config", \_SB.MAC0.MTX0 },
-        Package () { "snps,mixed-burst", " " },
-        Package () { "snps,tso", " " },
-        Package () { "snps,reset-active-low", " " },
-      }
-    })
-
-    Method(PRST, 0, Serialized) {
-      OperationRegion(CTRL, SystemMemory, 0xfec50000, 0x10)
-      Field(CTRL, DWordAcc,Lock, Preserve) {
-        DRL, 32,
-        DRH, 32,
-        DDRL, 32,
-        DDRH, 32,
-      }
-
-      Store(0x08000800, DDRL)
-      sleep(20)
-      Store(0x08000000, DRL)
-      sleep(200)
-      Store(0x08000800, DRL)
-      sleep(1000)
-    }
-
-    Method(RGMI, 2, Serialized) {
-      OperationRegion(PGRF, SystemMemory, 0xfd5b0008, 0x70)
-      Field(PGRF, DWordAcc,Lock, Preserve) {
-        CON0, 32,
-        Offset(0x68),
-        CLK1, 32,
-      }
-
-      OperationRegion(SGRF, SystemMemory, 0xfd58c31c, 0x8)
-      Field(SGRF, DWordAcc,Lock, Preserve) {
-        CON7, 32,
-        CON8, 32,
-      }
-
-      Store(0x00380008, CON0)
-      Store(0x00010000, CLK1)
-
-      if (LGreater(ToInteger(Arg0), 0)) {
-        Store(0x00040004, CON7)
-        local0 = Arg0 & 0xff
-        local0 = local0 | 0x00ff0000
-        Store(local0, CON8)
-      }
-
-      if (LGreater(ToInteger(Arg1), 0)) {
-        Store(0x00080008, CON7)
-        local1 = Arg1 & 0x00
-        local1 = local1 << 8
-        local1 = local1 | 0xff000000
-        Store(local1, CON8)
-      }
-    }
-
-    Method(RMII, 0, Serialized) {
-      OperationRegion(PGRF, SystemMemory, 0xfd5b0008, 0x70)
-      Field(PGRF, DWordAcc,Lock, Preserve) {
-        CON0, 32,
-        Offset(0x68),
-        CLK1, 32,
-      }
-
-      Store(0x00380020, CON0)
-      Store(0x00010001, CLK1)
-    }
-
-    Method(SPED, 1, Serialized) {
-      OperationRegion(PGRF, SystemMemory, 0xfd5b0070, 0x4)
-      Field(PGRF, DWordAcc,Lock, Preserve) {
-        CLK1, 32,
-      }
-
-      if (LEqual(Arg0, 1000)) {
-        Store(0x000c0000, CLK1)
-      }
-
-      if (LEqual(Arg0, 100)) {
-        Store(0x000c000c, CLK1)
-      }
-
-      if (LEqual(Arg0, 10)) {
-        Store(0x000c0008, CLK1)
-      }
-    }
-
-    Method(CLKS, 2, Serialized) {
-      OperationRegion(PGRF, SystemMemory, 0xfd5b0070, 0x4)
-      Field(PGRF, DWordAcc,Lock, Preserve) {
-        CLK1, 32,
-      }
-
-      if (LEqual(Arg0, 0)) {
-        Store(0x00100010, CLK1)
-      }
-
-      if (LEqual(Arg1, 1)) {
-        Store(0x00020000, CLK1)
-      }
-    }
-
-    Device (AST0)
-    {
-      Name (_DSD, Package() {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-          Package () { "snps,wr_osr_lmt", 4 },
-          Package () { "snps,rd_osr_lmt", 8 },
-          Package () { "snps,blen", package () { 0, 0, 0, 0, 16, 8, 4 }, },
-        }
-      })
-    }
-
-    Device (MRX0)
-    {
-      Name (_DSD, Package() {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-          Package () { "snps,rx-queues-to-use", 2 },
-        }
-      })
-
-      Device (rxq0) {
-        Name (_ADR, 0)
-      }
-
-      Device (rxq1) {
-        Name (_ADR, 1)
-      }
-    }
-
-    Device (MTX0)
-    {
-      Name (_DSD, Package() {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-          Package () { "snps,tx-queues-to-use", 2 },
-        }
-      })
-
-      Device (txq0) {
-        Name (_ADR, 0)
-      }
-
-      Device (txq1) {
-        Name (_ADR, 1)
-      }
-    }
-
-    Device (MDIO)
-    {
-      Name (_HID, "PRP0001")
-      Name (_UID, 0)
-
-      Name (_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-          Package () { "compatible", "snps,dwmac-mdio" },
-          Package () { "#address-cells", 1},
-        }
-      })
-
-      Device (PHY0)
-      {
-        Name (_HID, "PRP0001")
-        Name (_UID, 0)
-        Name (_ADR, 1)
-
-        Name (_DSD, Package () {
-          ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-          Package () {
-            Package () { "compatible", "ethernet-phy-ieee802.3-c22" },
-            Package () { "reg", 1},
-          }
-        })
-      }
-    }
-  }

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Gpio.asl

@@ -1,161 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2022, Rockchip Electronics Co. Ltd.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-//
-// Description: GPIO
-//
-Device (GPI0)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x0)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,gpio-bank" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFD8A0000, 0x100)
-      Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {309}
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}//GPIO0
-
-
-Device (GPI1)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x1)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,gpio-bank" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFEC20000, 0x100)
-      Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {310}
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}//GPIO1
-
-Device (GPI2)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x2)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,gpio-bank" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFEC30000, 0x100)
-      Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {311}
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}//GPIO2
-
-Device (GPI3)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x3)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,gpio-bank" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFEC40000, 0x100)
-      Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {312}
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}//GPIO3
-
-Device (GPI4)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x4)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,gpio-bank" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFEC50000, 0x100)
-      Interrupt(ResourceConsumer, Level, ActiveHigh, Shared) {313}
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}//GPIO4
-
-Device (PINC)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 0x4)
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-        Package () { "compatible", "rockchip,rk3588-pinctrl" },
-    }
-  })
-  Method (_CRS, 0x0, NotSerialized)
-  {
-    Name (RBUF, ResourceTemplate()
-    {
-      Memory32Fixed(ReadWrite, 0xFD5F0000, 0x10000)
-    })
-    Return(RBUF)
-  }
-  Method (_STA)
-  {
-    Return(0xf)
-  }
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Gtdt.aslc

@@ -1,88 +0,0 @@
-/** @file
-*  Generic Timer Description Table (GTDT)
-*
-*  Copyright (c) 2018, Linaro Limited. All rights reserved.
-*  Copyright (c) 2012 - 2016, ARM Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include "ArmPlatform.h"
-#include <Library/AcpiLib.h>
-#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
-
-#define GTDT_GLOBAL_FLAGS_MAPPED      EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT
-#define GTDT_GLOBAL_FLAGS_NOT_MAPPED  0
-#define GTDT_GLOBAL_FLAGS_EDGE        EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE
-#define GTDT_GLOBAL_FLAGS_LEVEL       0
-
-// Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
-#ifdef SYSTEM_TIMER_BASE_ADDRESS
-  #define GTDT_GLOBAL_FLAGS             (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
-#else
-  #define GTDT_GLOBAL_FLAGS             (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
-  #define SYSTEM_TIMER_BASE_ADDRESS     0xFFFFFFFFFFFFFFFF
-#endif
-
-#define GTDT_TIMER_EDGE_TRIGGERED   EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
-#define GTDT_TIMER_LEVEL_TRIGGERED  0
-#define GTDT_TIMER_ACTIVE_LOW       EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
-#define GTDT_TIMER_ACTIVE_HIGH      0
-
-#define GTDT_GTIMER_FLAGS           (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
-
-#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
-#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long
-#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
-#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
-#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
-
-#define ARM_ACPI_HEADER(Signature, Type, Revision) {              \
-      Signature,		      /* UINT32  Signature */	    \
-      sizeof (Type),		      /* UINT32  Length */	    \
-      Revision, 		      /* UINT8	 Revision */	    \
-      0,			      /* UINT8	 Checksum */	    \
-      { EFI_ACPI_ARM_OEM_ID },	      /* UINT8	 OemId[6] */	    \
-      EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */	    \
-      EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
-      EFI_ACPI_ARM_CREATOR_ID,	      /* UINT32  CreatorId */	    \
-      EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
-    }
-
-#pragma pack (1)
-
-typedef struct {
-  EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE          Gtdt;
-} GENERIC_TIMER_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
-GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {
-  {
-    ARM_ACPI_HEADER(
-      EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
-      GENERIC_TIMER_DESCRIPTION_TABLE,
-      EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
-    ),
-    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
-    0,                                            // UINT32  Reserved
-    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
-    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
-    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
-    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
-    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
-    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
-    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
-    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
-    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
-    0,                          // UINT32  PlatformTimerCount
-  },
-};
-
-//
-// Reference the table being generated to prevent the optimizer
-// from removing the data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Gtdt;

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/I2c.asl

@@ -1,55 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, ARM Limited. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-  Device (I2C2) {
-    Name (_HID, "PRP0001")
-    Name (_UID, 2)
-    Name (_CCA, 0)
-
-    Method (_CRS, 0x0, Serialized) {
-      Name (RBUF, ResourceTemplate() {
-        Memory32Fixed (ReadWrite, 0xfeaa0000, 0x1000)
-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 351 }
-      })
-      Return (RBUF)
-    }
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package (2) { "i2c,clk-rate", 198000000 },
-        Package (2) { "compatible", "rockchip,rk3399-i2c" },
-        Package (2) { "#address-cells", 1 },
-        Package (2) { "#size-cells", 0 },
-      }
-    })
-
-    OperationRegion(I2PC, SystemMemory, 0xFD7C0828, 0x4)
-      Field(I2PC, DWordAcc, Lock, WriteAsZeros) {
-      CG10, 32,
-    }
-
-    OperationRegion(I2SC, SystemMemory, 0xFD7C082c, 0x4)
-      Field(I2SC, DWordAcc, Lock, WriteAsZeros) {
-      CG11, 32,
-    }
-
-    Method(_PS3) {
-      Store (0x02000200, CG10)
-      Store (0x00020002, CG11)
-    }
-
-    Method(_PS0) {
-      Store (0x02000000, CG10)
-      Store (0x00020000, CG11)
-    }
-
-    Method(_PSC) {
-      Return(0x01)
-    }
-  }

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Madt.aslc

@@ -1,116 +0,0 @@
-/** @file
-*  Multiple APIC Description Table (MADT)
-*
-*  Copyright (c) 2021, Jared McNeill <jmcneill@invisible.ca>
-*  Copyright (c) 2012 - 2016, ARM Limited. All rights reserved.
-*  Copyright (c) 2018, Linaro Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <Library/AcpiLib.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
-
-#include "AcpiTables.h"
-
-//
-// Multiple APIC Description Table
-//
-#pragma pack (1)
-
-typedef struct {
-  EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
-  EFI_ACPI_6_0_GIC_STRUCTURE                            GicInterfaces[8];
-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
-  EFI_ACPI_6_0_GICR_STRUCTURE                           GicRedistributors;
-  EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE                  GicMsiFrame;
-  // EFI_ACPI_6_0_GIC_ITS_STRUCTURE                        GicIts[2];
-} EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
-EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
-  {
-    ACPI_HEADER (
-      EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
-      EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
-      EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
-    ),
-    //
-    // MADT specific fields
-    //
-    0, // LocalApicAddress
-    0, // Flags
-  },
-  {
-    // Format: EFI_ACPI_6_0_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr,
-    //                                          Flags,
-    //                                          PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)
-    // Note: The GIC Structure of the primary CPU must be the first entry
-    // (see note in 5.2.12.14 GICC Structure of ACPI v6.0).
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A55-0
-        0, 0, GET_MPID(0, 0x000), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 0),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A55-1
-        0, 1, GET_MPID(0, 0x100), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 0),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A55-2
-        0, 2, GET_MPID(0, 0x200), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 0),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A55-3
-        0, 3, GET_MPID(0, 0x300), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 0),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A76-0
-        0, 4, GET_MPID(0, 0x400), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 1),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A76-1
-        0, 5, GET_MPID(0, 0x500), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 1),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A76-2
-        0, 6, GET_MPID(0, 0x600), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 1),
-    EFI_ACPI_6_0_GICC_STRUCTURE_INIT( // A76-3
-        0, 7, GET_MPID(0, 0x700), 
-        EFI_ACPI_6_0_GIC_ENABLED,
-        23, 0, 0, 0, 25, 0, 1),
-  },
-  // GIC Distributor Entry
-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT (0, FixedPcdGet64 (PcdGicDistributorBase),
-                                     0, EFI_ACPI_6_0_GIC_V3),
-  // GIC Redistributors Entry
-  EFI_ACPI_6_0_GIC_REDISTRIBUTOR_INIT (FixedPcdGet64 (PcdGicRedistributorsBase), 
-                                       0x100000),
-  // GIC MSI Frame
-  {
-    EFI_ACPI_6_0_GIC_MSI_FRAME,
-    sizeof (EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE),
-    EFI_ACPI_RESERVED_WORD,
-    0,
-    FixedPcdGet64 (PcdGicDistributorBase) + 0x10000,
-    EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT,
-    56,
-    424
-  },
-
-  /* ITS is broken on RK35xx!*/
-  // {
-  //   EFI_ACPI_6_0_GIC_ITS_FRAME_INIT(0, 0xfe640000),
-  //   EFI_ACPI_6_0_GIC_ITS_FRAME_INIT(1, 0xfe660000)
-  // },
-};
-
-//
-// Reference the table being generated to prevent the optimizer
-// from removing the data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Madt;

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Mcfg.aslc

@@ -1,40 +0,0 @@
-/** @file
-*  PCI Express Memory-mapped Configuration Space base address description table (MCFG)
-*
-*  Copyright (c) 2022, Rockchip Inc.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
-#include "AcpiTables.h"
-
-#pragma pack(push, 1)
-
-typedef struct {
-  EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
-  EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Entry;
-} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
-
-EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = {
-    {
-        ACPI_HEADER (
-            EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
-            EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE,
-            EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION
-            ),
-    }, {
-        FixedPcdGet64 (PcdPcieRootPort3x4CfgBaseAddress),  //pcie3x4, + 0x8000?
-        0,  // PciSegmentNumber
-        0x0,  // PciBusMin
-        0xf,  // PciBusMax
-        0   // Reserved
-    }
-};
-
-#pragma pack(pop)
-
-VOID* CONST ReferenceAcpiTable = &Mcfg;
-

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Pcie.asl

@@ -1,119 +0,0 @@
-/** @file
-*  PCIe Controller devices.
-*
-*  Copyright (c) 2022, Rockchip Inc.
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "AcpiTables.h"
-
-// PCIe 3x4
-Device (PCI0) {
-	Name (_HID, "PNP0A08") // PCI Express Root Bridge
-	Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
-	Name (_CCA, Zero)
-	Name (_SEG, Zero)      // Segment of this Root complex
-	Name (_BBN, Zero)      // Base Bus Number
-
-	Name (_PRT, Package() { //legacy的支持需要route到不同的SPI，目前无法使用。。。
-		Package (4) { 0x0FFFF, 0, Zero, 292 },
-		Package (4) { 0x0FFFF, 1, Zero, 292 },
-		Package (4) { 0x0FFFF, 2, Zero, 292 },
-		Package (4) { 0x0FFFF, 3, Zero, 292 }
-	})
-
-	Method (_CRS, 0, Serialized) { // Root complex resources
-		Name (RBUF, ResourceTemplate () {
-		WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, // Bus numbers assigned to this root
-			0,    // Granularity
-			0,    // AddressMinimum - Minimum Bus Number
-			0xf,   // AddressMaximum - Maximum Bus Number
-			0,    // AddressTranslation - Set to 0
-			16,    // RangeLength - Number of Busses
-		)
-
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, // 32-bit BAR Windows
-			0x00000000,   // Granularity
-			FixedPcdGet32 (PcdPcieRootPort3x4MemBaseAddress),   // Range Minimum
-			0xF0FFFFFF,   // Range Maximum
-			0x00000000,   // Translation Offset
-			FixedPcdGet32 (PcdPcieRootPort3x4MemSize),   // Length
-		)
-
-		QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, // 64-bit BAR Windows
-			0x0000000000000000,   // Granularity
-			FixedPcdGet64 (PcdPcieRootPort3x4MemBaseAddress64),   // Range Minimum
-			0x000000093fffffff,   // Range Maximum
-			0x0000000000000000,   // Translation Offset
-			FixedPcdGet64 (PcdPcieRootPort3x4MemSize64),   // Length
-		)
-
-		QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,  // IO BAR Windows
-			0,                    // Granularity
-			0x0000,               // Range Minimum
-			0xFFFF,               // Range Maximum
-			FixedPcdGet32 (PcdPcieRootPort3x4IoBaseAddress),   		  // Translation Offset
-			FixedPcdGet32 (PcdPcieRootPort3x4IoSize),              // Length
-		)
-		})
-		return (RBUF)
-	}
-
-	// Method (_CBA, 0, NotSerialized) {
-	// 	return (0x900000000) //指定外设ECAM空间,acpi_pci_root_get_mcfg_addr拿到的是这个，且不能和Mcfg里面的地址一样
-	// }
-
-	Device (RES0) {
-        Name (_HID, "PNP0C02")
-		Name (_CRS, ResourceTemplate (){
-			Memory32Fixed (ReadWrite, 0xf5000000 , 0x400000) //DBI for accessing RC config base address
-			// 64-bit PCIe ECAM window
-			QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
-			0x0000000000000000,    // Granularity
-			0x0000000900000000,    // Range Minimum
-			0x0000000900ffffff,    // Range Maximum
-			0x0000000000000000,    // Translation Offset
-			0x0000000001000000,    // Length
-		)
-		})
-	}
-
-	// OS Control Handoff
-	Name(SUPP, Zero) // PCI _OSC Support Field value
-	Name(CTRL, Zero) // PCI _OSC Control Field value
-
-	// See [1] 6.2.10, [2] 4.5
-	Method(_OSC,4) {
-		// Note, This code is very similar to the code in the PCIe firmware
-		// specification which can be used as a reference
-		// Check for proper UUID
-		If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
-		// Create DWord-adressable fields from the Capabilities Buffer
-		CreateDWordField(Arg3,0,CDW1)
-		CreateDWordField(Arg3,4,CDW2)
-		CreateDWordField(Arg3,8,CDW3)
-		// Save Capabilities DWord2 & 3
-		Store(CDW2,SUPP)
-		Store(CDW3,CTRL)
-		// Mask out Native HotPlug
-		And(CTRL,0x1E,CTRL)
-		// Always allow native PME, AER (no dependencies)
-		// Never allow SHPC (no SHPC controller in this system)
-		And(CTRL,0x1D,CTRL)
-
-		If(LNotEqual(Arg1,One)) { // Unknown revision
-			Or(CDW1,0x08,CDW1)
-		}
-
-		If(LNotEqual(CDW3,CTRL)) {  // Capabilities bits were masked
-			Or(CDW1,0x10,CDW1)
-		}
-		// Update DWORD3 in the buffer
-		Store(CTRL,CDW3)
-		Return(Arg3)
-		} Else {
-		Or(CDW1,4,CDW1) // Unrecognized UUID
-		Return(Arg3)
-		}
-	} // End _OSC
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/RK3588PcieIort.aslc

@@ -1,139 +0,0 @@
-/** @file
-*  I/O Remapping Table (Iort)
-*
-*  Copyright (c) 2018, ARM Ltd. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/Acpi62.h>
-#include <IndustryStandard/IoRemappingTable.h>
-#include "AcpiTables.h"
-
-#pragma pack(1)
-
-#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
-#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long
-#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
-#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
-#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
-
-#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
-    Signature,                      /* UINT32  Signature */       \
-    sizeof (Type),                  /* UINT32  Length */          \
-    Revision,                       /* UINT8   Revision */        \
-    0,                              /* UINT8   Checksum */        \
-    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
-    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
-    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
-    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
-    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
-  }
-
-typedef struct
-{
-  EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE       ItsNode;
-  UINT32                                   ItsIdentifiers;
-} ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
-
-typedef struct
-{
-  EFI_ACPI_6_0_IO_REMAPPING_RC_NODE        RcNode;
-  EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE       RcIdMap;
-} ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
-
-typedef struct
-{
-  EFI_ACPI_6_0_IO_REMAPPING_TABLE          Header;
-  ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE   Its0Node;
-  ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE   Its1Node;
-  ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE    Rc3x4Node;
-} ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE;
-
-#pragma pack (1)
-
-ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort =
-{
-  // EFI_ACPI_6_0_IO_REMAPPING_TABLE
-  {
-     ARM_ACPI_HEADER  // EFI_ACPI_DESCRIPTION_HEADER
-     (
-       EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE,
-       ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE,
-       EFI_ACPI_IO_REMAPPING_TABLE_REVISION
-     ),
-     3,  // NumNodes
-     sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE),  // NodeOffset
-     0,  // Reserved
-  },
-
-  // ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
-  {
-    // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
-    {
-      // EFI_ACPI_6_0_IO_REMAPPING_NODE
-      {
-        EFI_ACPI_IORT_TYPE_ITS_GROUP,  // Type
-        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
-        0,  // Revision
-        0,  // Reserved
-        0,  // NumIdMappings
-        0,  // IdReference
-      },
-      1,    // ITS count
-    },
-    0,      // GIC ITS Identifiers
-  },
-
-  // ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
-  {
-    // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
-    {
-      // EFI_ACPI_6_0_IO_REMAPPING_NODE
-      {
-        EFI_ACPI_IORT_TYPE_ITS_GROUP,  // Type
-        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
-        0,  // Revision
-        0,  // Reserved
-        0,  // NumIdMappings
-        0,  // IdReference
-      },
-      1,    // ITS count
-    },
-    1,      // GIC ITS Identifiers
-  },
-  // ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
-  {
-    // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
-    {
-      // EFI_ACPI_6_0_IO_REMAPPING_NODE
-      {
-        EFI_ACPI_IORT_TYPE_ROOT_COMPLEX,  // Type
-        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE),  // Length
-        0,  // Revision
-        0,  // Reserved
-        1,  // NumIdMappings
-        OFFSET_OF (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap)  // IdReference
-      },
-      0,  // CacheCoherent
-      0,  // AllocationHints
-      0,  // Reserved
-      0,  // MemoryAccessFlags
-      EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED,    // AtsAttribute
-      0x0,                                         // PciSegmentNumber
-    },
-    // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
-    {
-      0x0000,  // InputBase
-      0xffff,  // NumIds
-      0x0000,  // OutputBase
-      OFFSET_OF (ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE, Its1Node),  // OutputReference
-      0,       // Flags
-    }
-  }
-};
-
-VOID* CONST ReferenceAcpiTable = &Iort;
-

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Sata.asl

@@ -1,68 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, ARM Limited. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-Device (ATA0) {
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfe210000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 305 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk-ahci" },
-    }
-  })
-}
-
-Device (ATA1) {
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfe220000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 306 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk-ahci" },
-    }
-  })
-}
-
-Device (ATA2) {
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfe230000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 307 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk-ahci" },
-    }
-  })
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Spcr.aslc

@@ -1,50 +0,0 @@
-/** @file
-*  Serial Port Console Redirection Table (SPCR).
-*
-*  Copyright (c) 2021, Jared McNeill <jmcneill@invisible.ca>
-*  Copyright (c) 2020 Linaro Ltd. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
-#include <Library/AcpiLib.h>
-
-#include "AcpiTables.h"
-
-#pragma pack(push, 1)
-
-STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
-  ACPI_HEADER (
-    EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
-    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
-    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION),
-  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550_WITH_GAS,
-  { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },
-  ARM_GAS32 (FixedPcdGet64 (PcdSerialRegisterBase)),
-  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
-  0,                      /* Irq */
-  365,                    /* GlobalSystemInterrupt */
-  0,
-  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
-  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
-  0,                      /* Flow Control */
-  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8,
-  EFI_ACPI_RESERVED_BYTE, /* Language */
-  0xFFFF,                 /* PciDeviceId */
-  0xFFFF,                 /* PciVendorId */
-  0x00,                   /* PciBusNumber */
-  0x00,                   /* PciDeviceNumber */
-  0x00,                   /* PciFunctionNumber */
-  0,                      /* PciFlags */
-  0,                      /* PciSegment */
-  EFI_ACPI_RESERVED_DWORD
-};
-
-#pragma pack(pop)
-
-// Reference the table being generated to prevent the optimizer from removing
-// the data structure from the executable
-VOID* CONST ReferenceAcpiTable = &Spcr;

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Spi.asl

@@ -1,145 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2022 ARM Limited. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-#include "AcpiTables.h"
-
-Device (SPI0)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfeb00000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 358 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk3036-spi" },
-      Package () { "clock-frequency", 200000000 },
-      Package () { "num-cs", 2 },
-    }
-  })
-}
-
-Device (SPI1)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfeb10000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 359 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk3036-spi" },
-      Package () { "clock-frequency", 200000000 },
-      Package () { "num-cs", 2 },
-    }
-  })
-}
-
-Device (SPI2)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfeb20000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 360 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk3036-spi" },
-      Package () { "clock-frequency", 200000000 },
-      Package () { "num-cs", 2 },
-    }
-  })
-}
-
-Device (SPI3)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfeb30000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 361 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk3036-spi" },
-      Package () { "clock-frequency", 200000000 },
-      Package () { "num-cs", 2 },
-    }
-  })
-}
-
-Device (SPI4)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfecb0000, 0x1000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 362 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,rk3036-spi" },
-      Package () { "clock-frequency", 200000000 },
-      Package () { "num-cs", 2 },
-    }
-  })
-}
-
-Device (SFC0)
-{
-  Name (_HID, "PRP0001")
-  Name (_UID, 3)
-  Name (_CCA, 0)
-
-  Method (_CRS, 0x0, Serialized) {
-    Name (RBUF, ResourceTemplate() {
-      Memory32Fixed (ReadWrite, 0xfe2b0000, 0x4000)
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 238 }
-    })
-    Return (RBUF)
-  }
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package (2) { "compatible", "rockchip,sfc" },
-      Package () { "clock-frequency", 100000000 },
-    }
-  })
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Uart.asl

@@ -1,36 +0,0 @@
-/** @file
- *
- *  [DSDT] Serial devices (UART).
- *
- *  Copyright (c) 2021, ARM Limited. All rights reserved.
- *  Copyright (c) 2020, Pete Batard <pete@akeo.ie>
- *  Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
- *  Copyright (c) Microsoft Corporation. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#include "AcpiTables.h"
-
-Device(UAR2) {
-  Name (_HID, "HISI0031")
-  Name (_UID, 2)
-  Name (_CRS, ResourceTemplate() {
-    Memory32Fixed(ReadWrite, 0xfeb50000, 0x1000)
-    Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 365 }
-  })
-
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package () { "reg-shift", 2 },
-      Package () { "reg-io-width", 4 },
-      Package () { "clock-frequency", 24000000 },
-    }
-  })
-
-  Method (_STA, 0, NotSerialized) {
-    Return(0x0F)
-  }
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Usb2.asl

@@ -1,189 +0,0 @@
-/** @file
-*  USB2 devices.
-*
-*  Copyright (c) 2022, Rockchip Electronics Co., Ltd
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "AcpiTables.h"
-
-// USB OHCI Host Controller
-Device (OHC0) {
-    Name (_HID, "PRP0001")
-    Name (_CLS, Package() { 0x0c, 0x03, 0x10 })
-    Name (_UID, Zero)
-    Name (_CCA, Zero)
-
-    Name (_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-            Package () { "compatible", "generic-ohci" },
-        }
-    })
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xFC840000, 0x40000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 248 }
-        })
-        Return (RBUF)
-    }
-
-    Device (RHUB) {
-        Name (_ADR, 0)
-        Device (PRT1) {
-            Name (_ADR, 1)
-            Name (_UPC, Package() {
-                0xFF,         // Port is connectable
-                0x00,         // Connector type - Type 'A'
-                0x00000000,   // Reserved, must be zero
-                0x00000000    // Reserved, must be zero
-            })
-            Name (_PLD, Package (0x01) {
-                ToPLD (
-                PLD_Revision            = 0x2,
-                PLD_IgnoreColor         = 0x1,
-                PLD_UserVisible         = 0x1,
-                PLD_Panel               = "UNKNOWN",
-                PLD_VerticalPosition    = "UPPER",
-                PLD_HorizontalPosition  = "LEFT",
-                PLD_Shape               = "HORIZONTALRECTANGLE",
-                PLD_Ejectable           = 0x1,
-                PLD_EjectRequired       = 0x1,
-                )
-            })
-        }
-    }
-}
-
-// USB EHCI Host Controller
-Device (EHC0) {
-    Name (_HID, "PNP0D20")
-    Name (_UID, Zero)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xFC800000, 0x40000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 247 }
-        })
-        Return (RBUF)
-    }
-
-    Device (RHUB) {
-        Name (_ADR, 0)
-        Device (PRT1) {
-            Name (_ADR, 1)
-            Name (_UPC, Package() {
-            0xFF,         // Port is connectable
-            0x00,         // Connector type - Type 'A'
-            0x00000000,   // Reserved, must be zero
-            0x00000000    // Reserved, must be zero
-            })
-            Name (_PLD, Package (0x01) {
-            ToPLD (
-                PLD_Revision            = 0x2,
-                PLD_IgnoreColor         = 0x1,
-                PLD_UserVisible         = 0x1,
-                PLD_Panel               = "UNKNOWN",
-                PLD_VerticalPosition    = "UPPER",
-                PLD_HorizontalPosition  = "LEFT",
-                PLD_Shape               = "HORIZONTALRECTANGLE",
-                PLD_Ejectable           = 0x1,
-                PLD_EjectRequired       = 0x1,
-            )
-            })
-        }
-    }
-}
-
-// USB OHCI Host Controller
-Device (OHC1) {
-    Name (_HID, "PRP0001")
-    Name (_CLS, Package() { 0x0c, 0x03, 0x10 })
-    Name (_UID, One)
-    Name (_CCA, Zero)
-
-    Name (_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package () {
-            Package () { "compatible", "generic-ohci" },
-        }
-    })
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xFC8C0000, 0x40000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 251 }
-        })
-        Return (RBUF)
-    }
-
-    Device (RHUB) {
-        Name (_ADR, 0)
-        Device (PRT1) {
-            Name (_ADR, 1)
-            Name (_UPC, Package() {
-                0xFF,         // Port is connectable
-                0x00,         // Connector type - Type 'A'
-                0x00000000,   // Reserved, must be zero
-                0x00000000    // Reserved, must be zero
-            })
-            Name (_PLD, Package (0x01) {
-                ToPLD (
-                PLD_Revision            = 0x2,
-                PLD_IgnoreColor         = 0x1,
-                PLD_UserVisible         = 0x1,
-                PLD_Panel               = "UNKNOWN",
-                PLD_VerticalPosition    = "LOWER",
-                PLD_HorizontalPosition  = "LEFT",
-                PLD_Shape               = "HORIZONTALRECTANGLE",
-                PLD_Ejectable           = 0x1,
-                PLD_EjectRequired       = 0x1,
-                )
-            })
-        }
-    }
-}
-
-// USB EHCI Host Controller
-Device (EHC1) {
-    Name (_HID, "PNP0D20")
-    Name (_UID, One)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xFC880000, 0x40000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 250 }
-        })
-        Return (RBUF)
-    }
-
-    Device (RHUB) {
-        Name (_ADR, 0)
-        Device (PRT1) {
-            Name (_ADR, 1)
-            Name (_UPC, Package() {
-                0xFF,         // Port is connectable
-                0x00,         // Connector type - Type 'A'
-                0x00000000,   // Reserved, must be zero
-                0x00000000    // Reserved, must be zero
-            })
-            Name (_PLD, Package (0x01) {
-                ToPLD (
-                PLD_Revision            = 0x2,
-                PLD_IgnoreColor         = 0x1,
-                PLD_UserVisible         = 0x1,
-                PLD_Panel               = "UNKNOWN",
-                PLD_VerticalPosition    = "LOWER",
-                PLD_HorizontalPosition  = "LEFT",
-                PLD_Shape               = "HORIZONTALRECTANGLE",
-                PLD_Ejectable           = 0x1,
-                PLD_EjectRequired       = 0x1,
-                )
-            })
-        }
-    }
-}

edk2-platforms/Platform/Radxa/ROCK5B/AcpiTables/Usb3.asl

@@ -1,54 +0,0 @@
-/** @file
-*  DWC3 XHCI Controllers.
-*
-*  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "AcpiTables.h"
-
-Device (XHC0) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, Zero)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfc000000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 252 }
-        })
-        Return (RBUF)
-    }   
-}
-
-Device (XHC1) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, One)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfc400000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 253 }
-        })
-        Return (RBUF)
-    }   
-}
-
-// This only supports USB 3.0 devices.
-// USB2 DP / DM are connected to one of the EHCI controllers instead (EHC1 on ROCK 5B).
-
-Device (XHC2) {
-    Name (_HID, "PNP0D10")
-    Name (_UID, 2)
-    Name (_CCA, Zero)
-
-    Method (_CRS, 0x0, Serialized) {
-        Name (RBUF, ResourceTemplate() {
-            Memory32Fixed (ReadWrite, 0xfcd00000, 0x400000)
-            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 254 }
-        })
-        Return (RBUF)
-    }   
-}

edk2-platforms/Platform/Radxa/ROCK5B/Include/Library/GpioLib.h

@@ -1,137 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2021, Jared McNeill <jmcneill@invisible.ca>
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#ifndef GPIOLIB_H__
-#define GPIOLIB_H__
-
-#define GPIO_PIN_PA0    0
-#define GPIO_PIN_PA1    1
-#define GPIO_PIN_PA2    2
-#define GPIO_PIN_PA3    3
-#define GPIO_PIN_PA4    4
-#define GPIO_PIN_PA5    5
-#define GPIO_PIN_PA6    6
-#define GPIO_PIN_PA7    7
-#define GPIO_PIN_PB0    8
-#define GPIO_PIN_PB1    9
-#define GPIO_PIN_PB2    10
-#define GPIO_PIN_PB3    11
-#define GPIO_PIN_PB4    12
-#define GPIO_PIN_PB5    13
-#define GPIO_PIN_PB6    14
-#define GPIO_PIN_PB7    15
-#define GPIO_PIN_PC0    16
-#define GPIO_PIN_PC1    17
-#define GPIO_PIN_PC2    18
-#define GPIO_PIN_PC3    19
-#define GPIO_PIN_PC4    20
-#define GPIO_PIN_PC5    21
-#define GPIO_PIN_PC6    22
-#define GPIO_PIN_PC7    23
-#define GPIO_PIN_PD0    24
-#define GPIO_PIN_PD1    25
-#define GPIO_PIN_PD2    26
-#define GPIO_PIN_PD3    27
-#define GPIO_PIN_PD4    28
-#define GPIO_PIN_PD5    29
-#define GPIO_PIN_PD6    30
-#define GPIO_PIN_PD7    31
-
-typedef enum {
-  GPIO_PIN_INPUT  = 0,
-  GPIO_PIN_OUTPUT = 1
-} GPIO_PIN_DIRECTION;
-
-typedef enum {
-  GPIO_PIN_PULL_NONE  = 0,
-  GPIO_PIN_PULL_UP    = 1,
-  GPIO_PIN_PULL_DOWN  = 2
-} GPIO_PIN_PULL;
-
-typedef enum {
-  GPIO_PIN_DRIVE_DEFAULT = 0xFF,
-  GPIO_PIN_DRIVE_DISABLE = 0x0,
-  GPIO_PIN_DRIVE_0       = 0x1,
-  GPIO_PIN_DRIVE_1       = 0x3,
-  GPIO_PIN_DRIVE_2       = 0x7,
-  GPIO_PIN_DRIVE_3       = 0xF,
-  GPIO_PIN_DRIVE_4       = 0x1F,
-  GPIO_PIN_DRIVE_5       = 0x3F
-} GPIO_PIN_DRIVE;
-
-typedef enum {
-  GPIO_PIN_INPUT_DEFAULT      = 0xFF,
-  GPIO_PIN_INPUT_DISABLE      = 0x0,
-  GPIO_PIN_INPUT_NON_SCHMITT  = 0x1,
-  GPIO_PIN_INPUT_SCHMITT      = 0x2
-} GPIO_PIN_INPUT_ENABLE;
-
-typedef struct {
-  CONST char *Name;
-  UINT8 Group;
-  UINT8 Pin;
-  UINT8 Function;
-  GPIO_PIN_PULL Pull;
-  GPIO_PIN_DRIVE Drive;
-} GPIO_IOMUX_CONFIG;
-
-VOID
-GpioPinSetDirection (
-  IN UINT8 Group,
-  IN UINT8 Pin,
-  IN GPIO_PIN_DIRECTION Direction
-  );
-
-VOID
-GpioPinWrite (
-  IN UINT8 Group,
-  IN UINT8 Pin,
-  IN BOOLEAN Value
-  );
-
-BOOLEAN
-GpioPinRead (
-  IN UINT8 Group,
-  IN UINT8 Pin
-  );
-
-// VOID
-// GpioPinSetFunction (
-//   IN UINT8 Group,
-//   IN UINT8 Pin,
-//   IN UINT8 Function
-//   );
-
-// VOID
-// GpioPinSetPull (
-//   IN UINT8 Group,
-//   IN UINT8 Pin,
-//   IN GPIO_PIN_PULL Pull
-//   );
-
-// VOID
-// GpioPinSetDrive (
-//   IN UINT8 Group,
-//   IN UINT8 Pin,
-//   IN GPIO_PIN_DRIVE Drive
-//   );
-
-// VOID
-// GpioPinSetInput (
-//   IN UINT8 Group,
-//   IN UINT8 Pin,
-//   IN GPIO_PIN_INPUT_ENABLE InputEnable
-//   );
-
-// VOID
-// GpioSetIomuxConfig (
-//   IN CONST GPIO_IOMUX_CONFIG *Configs,
-//   IN UINT32 NumConfigs
-//   );
-
-#endif /* GPIOLIB_H__ */

edk2-platforms/Platform/Radxa/ROCK5B/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.c

@@ -1,296 +0,0 @@
-/** @file
-  UART Serial Port library functions
-
-  Copyright (c) 2006 - 2009, Intel Corporation
-  Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
-  Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-  Based on the files under ArmPlatformPkg/Library/PL011SerialPortLib/
-**/
-#include <Uefi.h>
-#include <Library/PcdLib.h>
-#include <Library/SerialPortLib.h>
-#include <Library/IoLib.h>
-#include <Protocol/SerialIo.h>
-
-#include "Dw8250SerialPortLib.h"
-
-
-/**
-  Initialize the serial device hardware.
-
-  If no initialization is required, then return RETURN_SUCCESS.
-  If the serial device was successfuly initialized, then return RETURN_SUCCESS.
-  If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
-
-  @retval RETURN_SUCCESS        The serial device was initialized.
-  @retval RETURN_DEVICE_ERROR   The serail device could not be initialized.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortInitialize (
-  VOID
-  )
-{
-    UINT32 ulUartClkFreq;
-
-    MmioWrite8 (UART_LCR_REG, UART_LCR_DLS8);
-    MmioWrite8 (UART_FCR_REG, UART_FCR_EN | UART_FCR_RXCLR | UART_FCR_TXCLR);
-    MmioWrite8 (UART_LCR_REG, UART_LCR_DLAB | UART_LCR_DLS8);
-
-    ulUartClkFreq = PcdGet32(PcdUartClkInHz);
-
-    MmioWrite8 (UART_DLL_REG, (ulUartClkFreq / (16 * (UINT32)BAUDRATE) ) & 0xff);
-    MmioWrite8 (UART_DLH_REG, ((ulUartClkFreq/ (16 * (UINT32)BAUDRATE) ) >> 8 ) & 0xff);
-    MmioWrite8 (UART_LCR_REG, UART_LCR_DLS8);
-    MmioWrite8 (UART_IEL_REG, 0x00);
-
-    return RETURN_SUCCESS;
-}
-
-
-/**
-  Write data from buffer to serial device.
-
-  Writes NumberOfBytes data bytes from Buffer to the serial device.
-  The number of bytes actually written to the serial device is returned.
-  If the return value is less than NumberOfBytes, then the write operation failed.
-
-  If Buffer is NULL, then ASSERT().
-
-  If NumberOfBytes is zero, then return 0.
-
-  @param  Buffer           Pointer to the data buffer to be written.
-  @param  NumberOfBytes    Number of bytes to written to the serial device.
-
-  @retval 0                NumberOfBytes is 0.
-  @retval >0               The number of bytes written to the serial device.
-                           If this value is less than NumberOfBytes, then the read operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortWrite (
-  IN UINT8     *Buffer,
-  IN UINTN     NumberOfBytes
-)
-{
-  UINTN  Result;
-
-  if (NULL == Buffer) {
-    return 0;
-  }
-
-  Result = NumberOfBytes;
-
-  while (NumberOfBytes--) {
-
-    SerialPortWriteChar(*Buffer);
-    Buffer++;
-  }
-
-  return Result;
-}
-
-
-/**
-  Reads data from a serial device into a buffer.
-
-  @param  Buffer           Pointer to the data buffer to store the data read from the serial device.
-  @param  NumberOfBytes    Number of bytes to read from the serial device.
-
-  @retval 0                NumberOfBytes is 0.
-  @retval >0               The number of bytes read from the serial device.
-                           If this value is less than NumberOfBytes, then the read operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortRead (
-  OUT UINT8     *Buffer,
-  IN  UINTN     NumberOfBytes
-)
-{
-  UINTN  Result;
-
-  if (NULL == Buffer) {
-    return 0;
-  }
-
-  Result = 0;
-
-  while (NumberOfBytes--) {
-    //
-    // Wait for the serail port to be ready.
-    //
-    *Buffer=SerialPortReadChar();
-    Buffer++ ;
-    Result++;
-  }
-
-  return Result;
-}
-
-/**
-  Polls a serial device to see if there is any data waiting to be read.
-
-  Polls aserial device to see if there is any data waiting to be read.
-  If there is data waiting to be read from the serial device, then TRUE is returned.
-  If there is no data waiting to be read from the serial device, then FALSE is returned.
-
-  @retval TRUE             Data is waiting to be read from the serial device.
-  @retval FALSE            There is no data waiting to be read from the serial device.
-
-**/
-BOOLEAN
-EFIAPI
-SerialPortPoll (
-  VOID
-  )
-{
-
-  return (BOOLEAN) ((MmioRead8 (UART_LSR_REG) & UART_LSR_DR) == UART_LSR_DR);
-
-}
-
-
-VOID SerialPortWriteChar(UINT8 scShowChar)
-{
-    UINT32 ulLoop = 0;
-
-    while(ulLoop < (UINT32)UART_SEND_DELAY)
-    {
-
-        if ((MmioRead8 (UART_USR_REG) & 0x02) == 0x02)
-        {
-            break;
-        }
-
-        ulLoop++;
-    }
-    MmioWrite8 (UART_THR_REG, (UINT8)scShowChar);
-
-    ulLoop = 0;
-    while(ulLoop < (UINT32)UART_SEND_DELAY)
-    {
-        if ((MmioRead8 (UART_USR_REG) & 0x04) == 0x04)
-        {
-            break;
-        }
-        ulLoop++;
-    }
-
-    return;
-}
-
-
-UINT8 SerialPortReadChar(VOID)
-{
-    UINT8 recvchar = 0;
-
-    while(1)
-    {
-        if ((MmioRead8 (UART_LSR_REG) & UART_LSR_DR) == UART_LSR_DR)
-        {
-            break;
-        }
-    }
-
-    recvchar = MmioRead8 (UART_RBR_REG);
-
-    return recvchar;
-}
-
-/**
-  Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
-  data bits, and stop bits on a serial device.
-
-  @param BaudRate           The requested baud rate. A BaudRate value of 0 will use the
-                            device's default interface speed.
-                            On output, the value actually set.
-  @param ReveiveFifoDepth   The requested depth of the FIFO on the receive side of the
-                            serial interface. A ReceiveFifoDepth value of 0 will use
-                            the device's default FIFO depth.
-                            On output, the value actually set.
-  @param Timeout            The requested time out for a single character in microseconds.
-                            This timeout applies to both the transmit and receive side of the
-                            interface. A Timeout value of 0 will use the device's default time
-                            out value.
-                            On output, the value actually set.
-  @param Parity             The type of parity to use on this serial device. A Parity value of
-                            DefaultParity will use the device's default parity value.
-                            On output, the value actually set.
-  @param DataBits           The number of data bits to use on the serial device. A DataBits
-                            vaule of 0 will use the device's default data bit setting.
-                            On output, the value actually set.
-  @param StopBits           The number of stop bits to use on this serial device. A StopBits
-                            value of DefaultStopBits will use the device's default number of
-                            stop bits.
-                            On output, the value actually set.
-
-  @retval RETURN_SUCCESS            The new attributes were set on the serial device.
-  @retval RETURN_UNSUPPORTED        The serial device does not support this operation.
-  @retval RETURN_INVALID_PARAMETER  One or more of the attributes has an unsupported value.
-  @retval RETURN_DEVICE_ERROR       The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetAttributes (
-  IN OUT UINT64             *BaudRate,
-  IN OUT UINT32             *ReceiveFifoDepth,
-  IN OUT UINT32             *Timeout,
-  IN OUT EFI_PARITY_TYPE    *Parity,
-  IN OUT UINT8              *DataBits,
-  IN OUT EFI_STOP_BITS_TYPE *StopBits
-  )
-{
-  return RETURN_UNSUPPORTED;
-}
-
-/**
-  Set the serial device control bits.
-
-  @param  Control                 Control bits which are to be set on the serial device.
-
-  @retval EFI_SUCCESS             The new control bits were set on the serial device.
-  @retval EFI_UNSUPPORTED         The serial device does not support this operation.
-  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetControl (
-  IN UINT32                  Control
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Get the serial device control bits.
-
-  @param  Control                 Control signals read from the serial device.
-
-  @retval EFI_SUCCESS             The control bits were read from the serial device.
-  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortGetControl (
-  OUT UINT32                  *Control
-  )
-{
-
-    if (SerialPortPoll ()) {
-        // If a character is pending don't set EFI_SERIAL_INPUT_BUFFER_EMPTY
-        *Control = EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
-    } else {
-        *Control = EFI_SERIAL_INPUT_BUFFER_EMPTY | EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
-    }
-    return EFI_SUCCESS;
-}
-

edk2-platforms/Platform/Radxa/ROCK5B/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.h

@@ -1,110 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*  Copyright (c) 2015-2016, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2015-2016, Linaro Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-*  Based on the files under ArmPlatformPkg/Library/PL011SerialPortLib/
-**/
-
-#ifndef __DW8250_SERIALPORTLIB_H__
-#define __DW8250_SERIALPORTLIB_H__
-
-
-#define SERIAL_0_BASE_ADR     (PcdGet64(PcdSerialRegisterBase))
-
-
-#define UART_SEND_DELAY      (PcdGet32(PcdSerialPortSendDelay))
-#define BAUDRATE             (PcdGet64(PcdUartDefaultBaudRate))
-
-
-#define UART_THR_REG         (SERIAL_0_BASE_ADR + UART_THR)
-#define UART_RBR_REG         (SERIAL_0_BASE_ADR + UART_RBR)
-#define UART_DLL_REG         (SERIAL_0_BASE_ADR + UART_DLL)
-#define UART_DLH_REG         (SERIAL_0_BASE_ADR + UART_DLH)
-#define UART_IEL_REG         (SERIAL_0_BASE_ADR + UART_IEL)
-#define UART_IIR_REG         (SERIAL_0_BASE_ADR + UART_IIR)
-#define UART_FCR_REG         (SERIAL_0_BASE_ADR + UART_FCR)
-#define UART_LCR_REG         (SERIAL_0_BASE_ADR + UART_LCR)
-#define UART_LSR_REG         (SERIAL_0_BASE_ADR + UART_LSR)
-#define UART_USR_REG         (SERIAL_0_BASE_ADR + UART_USR)
-
-
-#define UART_RBR     0x00
-#define UART_THR     0x00
-#define UART_DLL     0x00
-#define UART_DLH     0x04
-#define UART_IEL     0x04
-#define UART_IIR     0x08
-#define UART_FCR     0x08
-#define UART_LCR     0x0C
-#define UART_MCR     0x10
-#define UART_LSR     0x14
-#define UART_USR     0x7C
-
-/* register definitions */
-
-#define UART_FCR_EN          0x01
-#define UART_FCR_RXCLR       0x02
-#define UART_FCR_TXCLR       0x04
-#define UART_FCR_CLEARFIFO   0x00
-#define UART_FCR_RXL1        0x00
-#define UART_FCR_RXL4        0x40
-#define UART_FCR_RXL8        0x80
-#define UART_FCR_RXL14       0xc0
-#define UART_FCR_TXL0        0x00
-#define UART_FCR_TXL4        0x20
-#define UART_FCR_TXL8        0x30
-#define UART_FCR_TXL14       0x10
-
-/*LCR Name: Line Control Register fields*/
-#define UART_LCR_DLAB   0x80
-#define UART_LCR_EPS    0x10
-#define UART_LCR_PEN    0x08
-#define UART_LCR_STOP   0x04
-#define UART_LCR_DLS8   0x03
-#define UART_LCR_DLS7   0x02
-#define UART_LCR_DLS6   0x01
-#define UART_LCR_DLS5   0x00
-
-
-#define UART_DLH_AND_DLL_WIDTH 0xFF
-
-
-#define UART_IER_PTIME  0x80
-#define UART_IER_ELSI   0x04
-#define UART_IER_ETBEI  0x02
-#define UART_IER_ERBFI  0x01
-
-
-#define UART_IIR_FIFOSE         0xC0
-
-
-#define UART_IIR_InterruptID   0x01
-#define UART_IIR_INTIDTE       0x02
-#define UART_IIR_INTIDRA       0x04
-#define UART_IIR_INTIDRLS      0x06
-#define UART_IIR_INTMASK       0x0f
-#define UART_IIR_RDA           0x04
-#define UART_IIR_TE            0x02
-
-#define UART_LSR_TEMT       0x40
-#define UART_LSR_THRE       0x20
-#define UART_LSR_BI         0x10
-#define UART_LSR_FE         0x08
-#define UART_LSR_PE         0x04
-#define UART_LSR_R          0x02
-#define UART_LSR_DR         0x01
-
-
-#define UART_USR_BUSY  0x01
-
-#define FIFO_MAXSIZE    32
-
-extern UINT8 SerialPortReadChar(VOID);
-extern VOID SerialPortWriteChar(UINT8 scShowChar);
-
-#endif
-

edk2-platforms/Platform/Radxa/ROCK5B/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf

@@ -1,36 +0,0 @@
-#/** @file
-#
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-#  Copyright (c) 2015-2016, Hisilicon Limited. All rights reserved.<BR>
-#  Copyright (c) 2015-2016, Linaro Limited. All rights reserved.<BR>
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-#  Based on the files under ArmPlatformPkg/Library/PL011SerialPortLib/
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = Dw8250SerialPortLib
-  FILE_GUID                      = 78337705-D2A8-4EA7-9C18-27FC4A8A2C6E
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = SerialPortLib
-
-[Sources.common]
-  Dw8250SerialPortLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
-
-[LibraryClasses]
-  BaseLib
-  IoLib
-
-[Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
-  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
-  gROCK5BTokenSpaceGuid.PcdSerialPortSendDelay
-  gROCK5BTokenSpaceGuid.PcdUartClkInHz

edk2-platforms/Platform/Radxa/ROCK5B/Library/PlatformBootManagerLib/PlatformBm.h

@@ -1,53 +0,0 @@
-/** @file
-  Head file for BDS Platform specific code
-
-  Copyright (C) 2015-2016, Red Hat, Inc.
-  Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
-  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef PLATFORM_BM_H_
-#define PLATFORM_BM_H_
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-
-/**
-  Use SystemTable Conout to stop video based Simple Text Out consoles from
-  going to the video device. Put up LogoFile on every video device that is a
-  console.
-
-  @param[in]  LogoFile   File name of logo to display on the center of the
-                         screen.
-
-  @retval EFI_SUCCESS     ConsoleControl has been flipped to graphics and logo
-                          displayed.
-  @retval EFI_UNSUPPORTED Logo not found
-**/
-EFI_STATUS
-EnableQuietBoot (
-  IN  EFI_GUID  *LogoFile
-  );
-
-/**
-  Use SystemTable Conout to turn on video based Simple Text Out consoles. The
-  Simple Text Out screens will now be synced up with all non video output
-  devices
-
-  @retval EFI_SUCCESS     UGA devices are back in text mode and synced up.
-**/
-EFI_STATUS
-DisableQuietBoot (
-  VOID
-  );
-
-#endif // PLATFORM_BM_H_

edk2-platforms/Platform/Radxa/ROCK5B/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf

@@ -1,97 +0,0 @@
-## @file
-#  Implementation for PlatformBootManagerLib library class interfaces.
-#
-#  Copyright (C) 2015-2016, Red Hat, Inc.
-#  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
-#  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PlatformBootManagerLib
-  FILE_GUID                      = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = PlatformBootManagerLib|DXE_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = ARM AARCH64
-#
-
-[Sources]
-  PlatformBm.c
-  PlatformBm.h
-
-[Packages]
-  EmbeddedPkg/EmbeddedPkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  MdePkg/MdePkg.dec
-  ShellPkg/ShellPkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
-  SimpleInit.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  BootLogoLib
-  CapsuleLib
-  DebugLib
-  DevicePathLib
-  DxeServicesLib
-  HobLib
-  MemoryAllocationLib
-  PcdLib
-  PrintLib
-  UefiBootManagerLib
-  UefiBootServicesTableLib
-  UefiLib
-  UefiRuntimeServicesTableLib
-
-[FeaturePcd]
-  gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
-
-[FixedPcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
-  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
-  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
-  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
-  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
-  gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
-
-[Pcd]
-  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
-  gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy
-
-[Guids]
-  gBootDiscoveryPolicyMgrFormsetGuid
-  gEdkiiNonDiscoverableEhciDeviceGuid
-  gEdkiiNonDiscoverableUhciDeviceGuid
-  gEdkiiNonDiscoverableXhciDeviceGuid
-  gEfiBootManagerPolicyNetworkGuid
-  gEfiBootManagerPolicyConnectAllGuid
-  gEfiFileInfoGuid
-  gEfiFileSystemInfoGuid
-  gEfiFileSystemVolumeLabelInfoIdGuid
-  gEfiEndOfDxeEventGroupGuid
-  gEfiTtyTermGuid
-  gUefiShellFileGuid
-  gSimpleInitFileGuid
-  gMaskromFileGuid
-
-[Protocols]
-  gEdkiiNonDiscoverableDeviceProtocolGuid
-  gEfiBootManagerPolicyProtocolGuid
-  gEfiDevicePathProtocolGuid
-  gEfiGraphicsOutputProtocolGuid
-  gEfiLoadedImageProtocolGuid
-  gEfiPciRootBridgeIoProtocolGuid
-  gEfiSimpleFileSystemProtocolGuid
-  gEsrtManagementProtocolGuid
-  gPlatformBootManagerProtocolGuid

edk2-platforms/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RK3588CruLib.c

@@ -1,395 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause */
-/*
- * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
- */
-#include "Include/Library/CruLib.h"
-#include <Library/DebugLib.h>
-/** @addtogroup RK_HAL_Driver
- *  @{
- */
-
-/** @addtogroup CRU
- *  @{
- */
-
-/** @defgroup CRU_Private_Definition Private Definition
- *  @{
- */
-/********************* Private MACRO Definition ******************************/
-/********************* Private Structure Definition **************************/
-
-static struct PLL_CONFIG PLL_TABLE[] = {
-    /* _mhz, _refDiv, _fbDiv, _postdDv1, _postDiv2, _dsmpd, _frac */
-    RK3588_PLL_RATE(1680000000, 2, 280, 1, 0),
-    RK3588_PLL_RATE(1512000000, 2, 252, 1, 0),
-    RK3588_PLL_RATE(1416000000, 2, 236, 1, 0),
-    RK3588_PLL_RATE(1188000000, 2, 198, 1, 0),
-    RK3588_PLL_RATE(1008000000, 2, 336, 2, 0),
-    RK3588_PLL_RATE(1000000000, 3, 500, 2, 0),
-    RK3588_PLL_RATE(983040000, 4, 655, 2, 23592),
-    RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
-    RK3588_PLL_RATE(100000000, 3, 400, 5, 0),
-    { /* sentinel */ },
-};
-
-static struct PLL_SETUP LPLL = {
-    .conOffset0 = &(DSUCRU->LPLL_CON[0]),
-    .conOffset1 = &(DSUCRU->LPLL_CON[1]),
-    .conOffset2 = &(DSUCRU->LPLL_CON[2]),
-    .conOffset3 = &(DSUCRU->LPLL_CON[3]),
-    .conOffset6 = &(DSUCRU->LPLL_CON[6]),
-    .modeOffset = &(DSUCRU->MODE_CON00),
-    .modeShift = 0,
-    .lockShift = 15,
-    .modeMask = 0x3,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP B0PLL = {
-    .conOffset0 = &(BIGCORE0CRU->B0PLL_CON[0]),
-    .conOffset1 = &(BIGCORE0CRU->B0PLL_CON[1]),
-    .conOffset2 = &(BIGCORE0CRU->B0PLL_CON[2]),
-    .conOffset3 = &(BIGCORE0CRU->B0PLL_CON[3]),
-    .conOffset6 = &(BIGCORE0CRU->B0PLL_CON[6]),
-    .modeOffset = &(BIGCORE0CRU->MODE_CON00),
-    .modeShift = 0,
-    .lockShift = 15,
-    .modeMask = 0x3,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP B1PLL = {
-    .conOffset0 = &(BIGCORE1CRU->B1PLL_CON[0]),
-    .conOffset1 = &(BIGCORE1CRU->B1PLL_CON[1]),
-    .conOffset2 = &(BIGCORE1CRU->B1PLL_CON[2]),
-    .conOffset3 = &(BIGCORE1CRU->B1PLL_CON[3]),
-    .conOffset6 = &(BIGCORE1CRU->B1PLL_CON[6]),
-    .modeOffset = &(BIGCORE1CRU->MODE_CON00),
-    .modeShift = 0,
-    .lockShift = 15,
-    .modeMask = 0x3,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP CPLL = {
-    .conOffset0 = &(CRU->CPLL_CON[0]),
-    .conOffset1 = &(CRU->CPLL_CON[1]),
-    .conOffset2 = &(CRU->CPLL_CON[2]),
-    .conOffset3 = &(CRU->CPLL_CON[3]),
-    .conOffset6 = &(CRU->CPLL_CON[6]),
-    .modeOffset = &(CRU->MODE_CON00),
-    .modeShift = 8,
-    .lockShift = 15,
-    .modeMask = 0x3 << 8,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP GPLL = {
-    .conOffset0 = &(CRU->GPLL_CON[0]),
-    .conOffset1 = &(CRU->GPLL_CON[1]),
-    .conOffset2 = &(CRU->GPLL_CON[2]),
-    .conOffset3 = &(CRU->GPLL_CON[3]),
-    .conOffset6 = &(CRU->GPLL_CON[6]),
-    .modeOffset = &(CRU->MODE_CON00),
-    .modeShift = 2,
-    .lockShift = 15,
-    .modeMask = 0x3 << 2,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP NPLL = {
-    .conOffset0 = &(CRU->NPLL_CON[0]),
-    .conOffset1 = &(CRU->NPLL_CON[1]),
-    .conOffset2 = &(CRU->NPLL_CON[2]),
-    .conOffset3 = &(CRU->NPLL_CON[3]),
-    .conOffset6 = &(CRU->NPLL_CON[6]),
-    .modeOffset = &(CRU->MODE_CON00),
-    .modeShift = 0,
-    .lockShift = 15,
-    .modeMask = 0x3 << 0,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP V0PLL = {
-    .conOffset0 = &(CRU->V0PLL_CON[0]),
-    .conOffset1 = &(CRU->V0PLL_CON[1]),
-    .conOffset2 = &(CRU->V0PLL_CON[2]),
-    .conOffset3 = &(CRU->V0PLL_CON[3]),
-    .conOffset6 = &(CRU->V0PLL_CON[6]),
-    .modeOffset = &(CRU->MODE_CON00),
-    .modeShift = 4,
-    .lockShift = 15,
-    .modeMask = 0x3 << 4,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP AUPLL = {
-    .conOffset0 = &(CRU->AUPLL_CON[0]),
-    .conOffset1 = &(CRU->AUPLL_CON[1]),
-    .conOffset2 = &(CRU->AUPLL_CON[2]),
-    .conOffset3 = &(CRU->AUPLL_CON[3]),
-    .conOffset6 = &(CRU->AUPLL_CON[6]),
-    .modeOffset = &(CRU->MODE_CON00),
-    .modeShift = 6,
-    .lockShift = 15,
-    .modeMask = 0x3 << 6,
-    .rateTable = PLL_TABLE,
-};
-
-static struct PLL_SETUP PPLL = {
-    .conOffset0 = &(PHPTOPCRU->PPLL_CON[0]),
-    .conOffset1 = &(PHPTOPCRU->PPLL_CON[1]),
-    .conOffset2 = &(PHPTOPCRU->PPLL_CON[2]),
-    .conOffset3 = &(PHPTOPCRU->PPLL_CON[3]),
-    .conOffset6 = &(PHPTOPCRU->PPLL_CON[6]),
-    .lockShift = 15,
-    .rateTable = PLL_TABLE,
-};
-
-/********************* Private Variable Definition ***************************/
-
-static uint32_t s_lpllFreq;
-static uint32_t s_cpllFreq = 1500 * 1000 * 1000;;
-static uint32_t s_gpllFreq = 1188 * 1000 * 1000;
-static uint32_t s_npllFreq;
-static uint32_t s_v0pllFreq;
-static uint32_t s_ppllFreq;
-static uint32_t s_aupllFreq;
-
-/********************* Private Function Definition ***************************/
-
-/** @} */
-/********************* Public Function Definition ****************************/
-
-/**
- * @brief Get clk freq.
- * @param  clockName: CLOCK_Name id.
- * @return rate.
- * @attention these APIs allow direct use in the HAL layer.
- */
-uint32_t
-EFIAPI
-HAL_CRU_ClkGetFreq(eCLOCK_Name clockName)
-{
-    uint32_t clkMux = CLK_GET_MUX(clockName);
-    uint32_t clkDiv = CLK_GET_DIV(clockName);
-    uint32_t pRate = 0, freq;
-
-    if (!s_cpllFreq) {
-        s_cpllFreq = HAL_CRU_GetPllV1Freq(&CPLL);
-    }
-
-    switch (clockName) {
-    case PLL_LPLL:
-        freq = HAL_CRU_GetPllV1Freq(&LPLL);
-        s_lpllFreq = freq;
-
-        return freq;
-    case PLL_B0PLL:
-        freq = HAL_CRU_GetPllV1Freq(&B0PLL);
-
-        return freq;
-    case PLL_B1PLL:
-        freq = HAL_CRU_GetPllV1Freq(&B1PLL);
-
-        return freq;
-    case PLL_CPLL:
-        freq = HAL_CRU_GetPllV1Freq(&CPLL);
-        s_cpllFreq = freq;
-
-        return freq;
-    case PLL_NPLL:
-        freq = HAL_CRU_GetPllV1Freq(&NPLL);
-        s_npllFreq = freq;
-
-        return freq;
-    case PLL_V0PLL:
-        freq = HAL_CRU_GetPllV1Freq(&V0PLL);
-        s_v0pllFreq = freq;
-
-        return freq;
-    case PLL_AUPLL:
-        freq = HAL_CRU_GetPllV1Freq(&AUPLL);
-        s_aupllFreq = freq;
-
-        return freq;
-    case PLL_PPLL:
-        freq = HAL_CRU_GetPllV1Freq(&PPLL);
-        s_ppllFreq = freq;
-
-        return freq;
-    case PLL_GPLL:
-        freq = HAL_CRU_GetPllV1Freq(&GPLL);
-        s_gpllFreq = freq;
-
-        return s_gpllFreq;
-     case CCLK_EMMC:
-     case SCLK_SFC:
-     case CCLK_SRC_SDIO:
-        if (HAL_CRU_ClkGetMux(clkMux) == 0) {
-            pRate = s_gpllFreq;
-        } else if (HAL_CRU_ClkGetMux(clkMux) == 1) {
-            pRate = s_cpllFreq;
-        } else if (HAL_CRU_ClkGetMux(clkMux) == 2) {
-            pRate = PLL_INPUT_OSC_RATE;
-        }
-
-        return pRate / HAL_CRU_ClkGetDiv(clkDiv) ;
-    case BCLK_EMMC:
-        if (HAL_CRU_ClkGetMux(clkMux) == 0) {
-            pRate = s_gpllFreq;
-        } else if (HAL_CRU_ClkGetMux(clkMux) == 1) {
-            pRate = s_cpllFreq;
-        }
-
-        return pRate / HAL_CRU_ClkGetDiv(clkDiv) ;
-    case CLK_REF_PIPE_PHY0:
-    case CLK_REF_PIPE_PHY1:
-    case CLK_REF_PIPE_PHY2:
-        if (HAL_CRU_ClkGetMux(clkMux) == 0) {
-            return PLL_INPUT_OSC_RATE;
-        } else if (HAL_CRU_ClkGetMux(clkMux) == 1) {
-             return s_ppllFreq / HAL_CRU_ClkGetDiv(clkDiv) ;
-        }
-    default:
-        break;
-    }
-
-    if ((clkMux == 0) && (clkDiv == 0)) {
-        return 0;
-    }
-
-    if (clkDiv) {
-        freq = pRate / (HAL_CRU_ClkGetDiv(clkDiv));
-    } else {
-        freq = pRate;
-    }
-
-    return freq;
-}
-
-/**
- * @brief Set clk freq.
- * @param  clockName: CLOCK_Name id.
- * @param  rate: clk rate.
- * @return HAL_Status.
- * @attention these APIs allow direct use in the HAL layer.
- */
-HAL_Status
-EFIAPI
-HAL_CRU_ClkSetFreq(eCLOCK_Name clockName, uint32_t rate)
-{
-    HAL_Status error = HAL_OK;
-    uint32_t clkMux = CLK_GET_MUX(clockName);
-    uint32_t clkDiv = CLK_GET_DIV(clockName);
-    uint32_t mux = 0, div = 0, pRate = 0;
-
-    if (!s_cpllFreq) {
-        s_cpllFreq = HAL_CRU_GetPllV1Freq(&CPLL);
-    }
-
-    switch (clockName) {
-    case PLL_LPLL:
-        error = HAL_CRU_SetPllV1Freq(&LPLL, rate);
-        s_lpllFreq = HAL_CRU_GetPllV1Freq(&LPLL);
-
-        return error;
-    case PLL_B0PLL:
-        error = HAL_CRU_SetPllV1Freq(&B0PLL, rate);
-
-        return error;
-    case PLL_B1PLL:
-        error = HAL_CRU_SetPllV1Freq(&B1PLL, rate);
-
-        return error;
-    case PLL_CPLL:
-        error = HAL_CRU_SetPllV1Freq(&CPLL, rate);
-        s_cpllFreq = HAL_CRU_GetPllV1Freq(&CPLL);
-
-        return error;
-    case PLL_PPLL:
-        error = HAL_CRU_SetPllV1Freq(&PPLL, rate);
-        s_ppllFreq = HAL_CRU_GetPllV1Freq(&PPLL);
-
-        return error;
-    case PLL_GPLL:
-        error = HAL_CRU_SetPllV1Freq(&GPLL, rate);
-        DEBUG ((DEBUG_INIT, "GPLL set rate: %d %x\n", rate, error));
-        s_gpllFreq = HAL_CRU_GetPllV1Freq(&GPLL);
-        return error;
-    case PLL_NPLL:
-        error = HAL_CRU_SetPllV1Freq(&NPLL, rate);
-        s_npllFreq = HAL_CRU_GetPllV1Freq(&NPLL);
-
-        return error;
-    case PLL_AUPLL:
-        error = HAL_CRU_SetPllV1Freq(&AUPLL, rate);
-        s_aupllFreq = HAL_CRU_GetPllV1Freq(&AUPLL);
-
-        return error;
-    case PLL_V0PLL:
-        error = HAL_CRU_SetPllV1Freq(&V0PLL, rate);
-        s_v0pllFreq = HAL_CRU_GetPllV1Freq(&V0PLL);
-
-        return error;
-
-     case CCLK_EMMC:
-     case SCLK_SFC:
-     case CCLK_SRC_SDIO:
-        if (PLL_INPUT_OSC_RATE % rate == 0) {
-            pRate = PLL_INPUT_OSC_RATE;
-            mux = 2;
-        } else if (s_cpllFreq % rate == 0){
-            pRate = s_cpllFreq;
-            mux = 1;
-        } else {
-            pRate = s_gpllFreq;
-            mux = 0;
-        }
-        break;
-    case BCLK_EMMC:
-         if (s_cpllFreq % rate == 0){
-            pRate = s_cpllFreq;
-            mux = 1;
-        } else {
-            pRate = s_gpllFreq;
-            mux = 0;
-        }
-        break;
-
-    case CLK_REF_PIPE_PHY0:
-    case CLK_REF_PIPE_PHY1:
-    case CLK_REF_PIPE_PHY2:
-        if (rate == PLL_INPUT_OSC_RATE) {
-            HAL_CRU_ClkSetMux(clkMux, 0);
-            HAL_CRU_ClkSetDiv(clkDiv, 0);
-        } else {
-            div = HAL_DIV_ROUND_UP(s_ppllFreq, rate);
-            HAL_CRU_ClkSetDiv(clkDiv, div);
-            HAL_CRU_ClkSetMux(clkMux, 1);
-        }
-        return HAL_OK;
-
-    default:
-        break;
-    }
-
-    if ((clkMux == 0) && (clkDiv == 0)) {
-        return HAL_INVAL;
-    }
-
-    div = HAL_DIV_ROUND_UP(pRate, rate);
-    if (clkMux) {
-        HAL_CRU_ClkSetMux(clkMux, mux);
-    }
-    if (clkDiv) {
-        HAL_CRU_ClkSetDiv(clkDiv, div);
-    }
-
-    return HAL_OK;
-}
-/** @} */
-
-/** @} */
-
-/** @} */

edk2-platforms/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipPlatformLib.c

@@ -9,8 +9,41 @@
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/GpioLib.h>
+#include <Library/RK806.h>
 #include <Soc.h>
 
+static struct regulator_init_data rk806_init_data[] = {
+  /* Master PMIC */
+
+  /* TODO: Figure out the correct voltages
+  
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK1, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK2, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK3, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK4, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK5, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK6, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK7, 2000000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK8, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_BUCK10, 1100000),
+
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO1, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO2, 900000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO3, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO4, 750000),
+  RK8XX_VOLTAGE_INIT(MASTER_NLDO5, 850000),
+
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO1, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO2, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO3, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO4, 3300000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO5, 1800000),
+  RK8XX_VOLTAGE_INIT(MASTER_PLDO6, 1800000),
+  */
+
+  /* No dual PMICs on this platform */
+};
+
 void DebugPrintHex(void *buf, UINT32 width, UINT32 len)
 {
   UINT32 i,j;
@@ -76,6 +109,20 @@ Rk806SpiIomux(void)
   MmioWrite32(NS_CRU_BASE + CRU_CLKSEL_CON59, (0x00C0UL << 16) | 0x0080);
 }
 
+VOID
+EFIAPI
+Rk806Configure(
+  VOID
+)
+{
+  UINTN RegCfgIndex;
+
+  RK806Init();
+
+  for (RegCfgIndex = 0; RegCfgIndex < ARRAY_SIZE(rk806_init_data); RegCfgIndex++)
+    RK806RegulatorInit(rk806_init_data[RegCfgIndex]);
+}
+
 void
 EFIAPI
 NorFspiIomux(void)

edk2-platforms/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipPlatformLib.inf

@@ -11,6 +11,7 @@
   MODULE_TYPE                    = BASE
   VERSION_STRING                 = 1.0
   LIBRARY_CLASS                  = RockchipPlatformLib
+  RKPLATLIB_COMMON_DIR           = Silicon/Rockchip/RK3588/Library/RockchipPlatformLibCommon
 
 [Packages]
   EmbeddedPkg/EmbeddedPkg.dec
@@ -19,7 +20,6 @@
   Platform/Rockchip/RK3588/RK3588.dec
   Silicon/Rockchip/RK3588/RK3588.dec
   Silicon/Rockchip/RockchipPkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
 
 [LibraryClasses]
   ArmLib
@@ -32,8 +32,8 @@
 
 [Sources.common]
   RockchipPlatformLib.c
-  RK3588CruLib.c
-  RockchipSdhci.c
+  $(RKPLATLIB_COMMON_DIR)/RK3588CruLib.c
+  $(RKPLATLIB_COMMON_DIR)/RockchipSdhci.c
 
 [Sources.AARCH64]
 

edk2-platforms/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipSdhci.c

@@ -1,163 +0,0 @@
-/** @file
- *
- *  Copyright (c) 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
- *  Copyright (c) Microsoft Corporation. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#include "RockchipSdhci.h"
-#include <Library/PcdLib.h>
-#include <Library/TimerLib.h>
-
-#define word32   *(volatile unsigned int *)(long)
-#define word16   *(volatile unsigned short *)(long)
-
-//#define GRF_BASE            0xFDC60000
-#define NS_CRU_BASE         0xFD7C0000
-#define CRU_CLKSEL_CON77    0x0434
-#define CRU_GPLL_CON1   0x1C4
-#define CRU_CPLL_CON1   0x1A4
-
-#define EMMC_CLOCK_BASE     (NS_CRU_BASE + CRU_CLKSEL_CON77)
-#define EMMC_CLOCK_SEL(a)   (((7 << 12) << 16) | (a << 12))
-
-#define EMMC_BASE           PcdGet32 (PcdSdhciDxeBaseAddress)
-#define SDHCI_HOST_CTRL2  (EMMC_BASE + 0x3E)
-#define SDHCI_HOST_CTRL3  (EMMC_BASE + 0x508)
-#define SDHCI_EMMC_CTRL   (EMMC_BASE + 0x52C)
-
-#define DWCMSHC_CARD_IS_EMMC		BIT0
-
-#define EMMC_DLL_CTRL       (EMMC_BASE + 0x800)
-#define EMMC_DLL_RXCLK      (EMMC_BASE + 0x804)
-#define EMMC_DLL_TXCLK      (EMMC_BASE + 0x808)
-#define EMMC_DLL_STRBIN     (EMMC_BASE + 0x80C)
-#define EMMC_DLL_CMDOUT     (EMMC_BASE + 0x810)
-#define EMMC_DLL_STATUS0    (EMMC_BASE + 0x840)
-#define EMMC_DLL_STATUS1    (EMMC_BASE + 0x844)
-
-EFI_STATUS SdhciSetPHY(
-  IN UINTN Clock
-  )
-{
-  UINT32 Ctrl2, Ctrl;
-  UINT32 status, timeout, tmp;
-
-  word32(SDHCI_EMMC_CTRL) |= (1 << 0); /* Host Controller is an eMMC card */
-  if (Clock < 100000000) {
-    word32(EMMC_DLL_CTRL) = 0;
-    word32(EMMC_DLL_RXCLK) = 0; /* PIO mode need set bit 29*/
-    word32(EMMC_DLL_TXCLK) = 0;
-    word32(EMMC_DLL_STRBIN) = (1 << 27) | (1 << 26) | (10 << 16);;
-    word32(EMMC_DLL_CMDOUT) = 0;
-    goto exit;
-  }
-
-  word32(EMMC_DLL_RXCLK) = 0;
-  /*Reset DLL*/
-  word32(EMMC_DLL_CTRL) = (0x1 << 1);
-  MicroSecondDelay(5);
-  word32(EMMC_DLL_CTRL)  = 0;
-  /*Init DLL*/
-  word32(EMMC_DLL_CTRL) = (5 << 16) | (2 << 8) | 0x1;
-
-  /* Wait max 10 ms */
-  timeout = 10000;
-  while (1) {
-    status = word32(EMMC_DLL_STATUS0);
-    tmp = (status >> 8) & 0x3;
-    if (0x1 == tmp) /*check dll lock*/
-      break;
-
-    if (timeout-- > 0)
-      MicroSecondDelay(1);
-    else {
-      DEBUG ((DEBUG_ERROR, "%a timeout status:%x\n", __FUNCTION__, status));
-      return EFI_TIMEOUT;
-    }
-  }
-
-  Ctrl2 = word16(SDHCI_HOST_CTRL2) & 0x0007; /* Get Bus Speed Mode*/
-  if (Clock >= 200000000 && Ctrl2 == 0x7) { /*check is HS400 mode*/
-    word32(SDHCI_EMMC_CTRL) |= (1 << 8); /* CMD line is sampled using data strobe for HS400 mode */
-    word32(EMMC_DLL_RXCLK) = (1 << 27);
-    word32(EMMC_DLL_TXCLK) = (1 << 29) | (1 << 27) | (1 << 24) | 0x8;
-    word32(EMMC_DLL_STRBIN) = (1 << 27) | (1 << 24) | 0x4;
-    word32(EMMC_DLL_CMDOUT) = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 24) | 0x8;
-
-	/* set CARD_IS_EMMC bit to enable Data Strobe for HS400 */
-	Ctrl = word32(SDHCI_EMMC_CTRL);
-	Ctrl |= DWCMSHC_CARD_IS_EMMC;
-	word32(SDHCI_EMMC_CTRL) = Ctrl;
-  }
-  else { /*config for HS200 mode*/
-    word32(EMMC_DLL_RXCLK) = (1 << 29) | (1 << 27);
-    word32(EMMC_DLL_TXCLK) = (1 << 27) | (1 << 24) | 0x1;
-    word32(EMMC_DLL_STRBIN) = 0;	  //max is 16
-  }
-
-exit:
-  //DEBUG ((DEBUG_ERROR, "EMMC_DLL_CTRL :0x%x\n", word32(EMMC_DLL_CTRL)));
-  //DEBUG ((DEBUG_ERROR, "EMMC_DLL_RXCLK:0x%x\n", word32(EMMC_DLL_RXCLK)));
-  //DEBUG ((DEBUG_ERROR, "EMMC_DLL_TXCLK:0x%x\n", word32(EMMC_DLL_TXCLK)));
-  //DEBUG ((DEBUG_ERROR, "EMMC_DLL_STRBIN:0x%x\n", word32(EMMC_DLL_STRBIN)));
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-EFIAPI
-SdhciGetClockRate(
-  IN UINTN TargetFreq,
-  OUT UINTN *BaseFreq
-  )
-{
-  UINT32 CClkEmmcSel, Div;
-
-  if (TargetFreq == 0 || BaseFreq == NULL)
-    return -1;
-
-  //word32(NS_CRU_BASE + CRU_GPLL_CON1) = 0x70002 << 6; //GPLL:600MHz
-  //word32(NS_CRU_BASE + CRU_CPLL_CON1) = 0x70002 << 6; //CPLL:750MHZ
-
-  /*GPLL:1184MHz, CPLL:750MHZ
-  2'b00: clk_gpll_mux
-  2'b01: clk_cpll_mux
-  2'b10: xin_osc0_func*/
-  if (TargetFreq >= 200000000) {
-    CClkEmmcSel = 0;
-    Div = 6;
-  } else if (TargetFreq >= 150000000) {
-    CClkEmmcSel = 0;
-    Div = 8;
-  } else if (TargetFreq >= 100000000) {
-    CClkEmmcSel = 0;
-    Div = 12;
-  } else if (TargetFreq >= 50000000) {
-    CClkEmmcSel = 0;
-    Div = 24;
-  } else if (TargetFreq >= 24000000) {
-    CClkEmmcSel = 2;
-    Div = 1;
-  } else { /* 375KHZ*/
-    CClkEmmcSel = 2;
-    Div = 64;
-  }
-
-  DEBUG((DEBUG_ERROR, "+++++SetEmmcClk: %d, %d, %d\n", TargetFreq, CClkEmmcSel, Div));
-
-  *BaseFreq = TargetFreq;
-  MmioWrite32(EMMC_CLOCK_BASE, ((( 0x3 << 14 )|( 0x3F << 8 )) << 16 ) |
-                                ( CClkEmmcSel << 14 ) |
-                                (( Div - 1 ) << 8));
-
-  //DEBUG ((DEBUG_ERROR, "CRU_0X434: 0x%x\n", word32(NS_CRU_BASE + 0x0434)));
-  //DEBUG ((DEBUG_ERROR, "CRU_0X438: 0x%x\n", word32(NS_CRU_BASE + 0x0438))); 
-  //DEBUG ((DEBUG_ERROR, "GPLL_CON1: 0x%x\n", word32(NS_CRU_BASE + CRU_GPLL_CON1)));
-  //DEBUG ((DEBUG_ERROR, "CPLL_CON1: 0x%x\n", word32(NS_CRU_BASE + CRU_CPLL_CON1)));
-  SdhciSetPHY(TargetFreq);
-
-  return EFI_SUCCESS;
-}
-

edk2-platforms/Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipSdhci.h

@@ -1,29 +0,0 @@
-/** @file
- *
- *  Copyright (c) Rockchip Corporation. All rights reserved.
- *
- *  SPDX-License-Identifier: BSD-2-Clause-Patent
- *
- **/
-
-#ifndef _ROCKCHIP_SDHCI_H_
-#define _ROCKCHIP_SDHCI_H_
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DmaLib.h>
-#include <Protocol/EmbeddedExternalDevice.h>
-
-EFI_STATUS
-SdhciGetClockRate (
-  IN UINTN TargetFreq,
-  OUT UINTN *BaseFreq
-  );
-#endif

edk2-platforms/Platform/Radxa/ROCK5B/ROCK5B.dec

@@ -1,35 +0,0 @@
-#
-#  Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-[Defines]
-  DEC_SPECIFICATION              = 0x0001001a
-  PACKAGE_NAME                   = ROCK5B
-  PACKAGE_GUID                   = 7eb1de03-3910-4d1d-84ce-c17b53636b9a
-  PACKAGE_VERSION                = 1.0
-
-[Includes.common]
-  Include                        # Root include for the package
-
-[Guids.common]
-  gROCK5BTokenSpaceGuid          = { 0x99a14446, 0xaad7, 0xe460, { 0xb4, 0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
-  gMaskromFileGuid               = { 0x6987437F, 0xED34, 0x44db, { 0xae, 0x97, 0x1f, 0xa5, 0xe4, 0xed, 0x21, 0x16 } }
-
-[Protocols]
-
-[Guids]
-
-[PcdsFixedAtBuild.common]
-  gROCK5BTokenSpaceGuid.PcdSerialPortSendDelay|500000|UINT32|0x01000010
-  gROCK5BTokenSpaceGuid.PcdUartClkInHz|24000000|UINT32|0x0100001F
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxBase|0x0010f000|UINT64|0x00001000
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSize|0x100|UINT32|0x00001001
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSmcId|0x82000010|UINT32|0x00010002

edk2-platforms/Platform/Radxa/ROCK5B/ROCK5B.dsc

@@ -39,7 +39,10 @@
   DEFINE NETWORK_VLAN_ENABLE            = FALSE
 !include Silicon/Rockchip/Rockchip.dsc.inc
 !include MdePkg/MdeLibs.dsc.inc
-!include SimpleInit.inc
+
+!if $(ENABLE_SIMPLE_INIT)
+  !include SimpleInit.inc
+!endif
 
 [LibraryClasses.common]
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
@@ -86,24 +89,26 @@
   UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
   LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
 
+  # OTP Library
+  OtpLib|Silicon/Rockchip/RK3588/Library/OtpLib/OtpLib.inf
 
   #
   # Custom libraries
   #
   RockchipPlatformLib|Platform/Radxa/ROCK5B/Library/RockchipPlatformLib/RockchipPlatformLib.inf
-  ResetSystemLib|Platform/Radxa/ROCK5B/Library/ResetSystemLib/ResetSystemLib.inf
-  PlatformBootManagerLib|Platform/Radxa/ROCK5B/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
-  SerialPortLib|Platform/Radxa/ROCK5B/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
-  GpioLib|Platform/Radxa/ROCK5B/Library/GpioLib/GpioLib.inf
+  ResetSystemLib|Silicon/Rockchip/Library/ResetSystemLib/ResetSystemLib.inf
+  PlatformBootManagerLib|Silicon/Rockchip/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
+  GpioLib|Silicon/Rockchip/RK3588/Library/GpioLib/GpioLib.inf
   # SCMI Mailbox Transport Layer
-  ArmMtlLib|Platform/Radxa/ROCK5B/Library/RkMtlLib/RkMtlLib.inf
+  ArmMtlLib|Silicon/Rockchip/Library/RkMtlLib/RkMtlLib.inf
 
 [LibraryClasses.common.SEC]
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
   ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
   HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
   MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
-  MemoryInitPeiLib|Platform/Radxa/ROCK5B/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf
+  MemoryInitPeiLib|Silicon/Rockchip/RK3588/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
   PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
 
@@ -137,6 +142,13 @@
   gArmPlatformTokenSpaceGuid.PcdCoreCount|8
   gArmPlatformTokenSpaceGuid.PcdClusterCount|1
 
+  # SMBIOS platform config
+  gRockchipTokenSpaceGuid.PcdPlatformName|"ROCK 5 Model B"
+  gRockchipTokenSpaceGuid.PcdPlatformVendorName|"Radxa"
+  gRockchipTokenSpaceGuid.PcdFamilyName|"ROCK 5"
+  gRockchipTokenSpaceGuid.PcdProductUrl|"https://wiki.radxa.com/Rock5/hardware/5b"
+  gRockchipTokenSpaceGuid.PcdMemoryVendorName|"TBD"
+
   # I2C
   gRockchipTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x51 }
   gRockchipTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x2 }
@@ -151,6 +163,8 @@
   DEFINE SERIAL_BASE = 0xFEB50000 # UART2
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE)
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|1500000
+  gHisiTokenSpaceGuid.PcdSerialPortSendDelay|500000
+  gHisiTokenSpaceGuid.PcdUartClkInHz|24000000
 
   ## SPI - SPI2 for test
   gRockchipTokenSpaceGuid.SpiTestBaseAddr|0xFEB20000
@@ -422,7 +436,7 @@
   #EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
   #Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   Silicon/Rockchip/Drivers/MmcDxe/MmcDxe.inf
-  Platform/Radxa/ROCK5B/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+  Silicon/Rockchip/RK3588/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   Silicon/Rockchip/Drivers/SdhciHostDxe/SdhciHostDxe.inf
 
   #
@@ -447,7 +461,7 @@
   #
   # SMBIOS Support
   #
-  Platform/Radxa/ROCK5B/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+  Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
   
   #
@@ -525,6 +539,7 @@
   MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
   MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
   MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
   FatPkg/EnhancedFatDxe/Fat.inf
 
   #
@@ -574,8 +589,8 @@
   #
   # Custom Applications and drivers
   #
-  Platform/Radxa/ROCK5B/Applications/maskrom/maskrom.inf
+  Silicon/Rockchip/Applications/MaskromReset/maskrom.inf
 
   # Platform drivers
-  Platform/Radxa/ROCK5B/Drivers/RK3588Dxe_rock5b/RK3588Dxe.inf
+  Silicon/Rockchip/RK3588/Drivers/RK3588Dxe/RK3588Dxe.inf
 

edk2-platforms/Platform/Radxa/ROCK5B/ROCK5B.fdf

@@ -169,12 +169,12 @@ READ_LOCK_STATUS   = TRUE
   INF Silicon/Rockchip/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
   INF Platform/Radxa/Drivers/LogoDxe/LogoDxe.inf
 
-  INF Platform/Radxa/ROCK5B/Drivers/RK3588Dxe_rock5b/RK3588Dxe.inf
+  INF Silicon/Rockchip/RK3588/Drivers/RK3588Dxe/RK3588Dxe.inf
 
   #
   # SMBIOS Support
   #
-  INF Platform/Radxa/ROCK5B/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+  INF Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
   INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 
   #
@@ -270,6 +270,7 @@ READ_LOCK_STATUS   = TRUE
   #
   INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
   INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
   INF FatPkg/EnhancedFatDxe/Fat.inf
   INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 
@@ -278,7 +279,7 @@ READ_LOCK_STATUS   = TRUE
   #
   # INF Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   INF Silicon/Rockchip/Drivers/MmcDxe/MmcDxe.inf
-  INF Platform/Radxa/ROCK5B/Drivers/DwEmmcDxe/DwEmmcDxe.inf
+  INF Silicon/Rockchip/RK3588/Drivers/DwEmmcDxe/DwEmmcDxe.inf
   
   # Needs to be disabled if booting from eMMC
   # INF Silicon/Rockchip/Drivers/SdhciHostDxe/SdhciHostDxe.inf
@@ -304,7 +305,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
   # Custom
-  INF Platform/Radxa/ROCK5B/Applications/maskrom/maskrom.inf
+  INF Silicon/Rockchip/Applications/MaskromReset/maskrom.inf
   
   # SCMI Driver
   INF ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
@@ -330,7 +331,9 @@ READ_LOCK_STATUS   = TRUE
   #
   # Simple Init GUI
   #
+!if $(ENABLE_SIMPLE_INIT)
   INF src/main/SimpleInitMain.inf
+!endif
 
 [FV.BL33_AP_UEFI]
 FvAlignment        = 8

edk2-platforms/Silicon/Rockchip/Applications/MaskromReset/maskrom.inf

@@ -12,7 +12,7 @@
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
+  Silicon/Rockchip/RockchipPkg.dec
 
 [LibraryClasses]
   UefiApplicationEntryPoint

edk2-platforms/Silicon/Rockchip/Drivers/PlatformSmbiosDxe/Crc32Table.h

@@ -0,0 +1,266 @@
+/** @file
+ *
+ *  Copyright (c) 2022, Jared McNeill <jmcneill@invisible.ca>
+ *
+ *  SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+ 
+GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32  mCrcTable[256] = {
+  0x00000000,
+  0x77073096,
+  0xEE0E612C,
+  0x990951BA,
+  0x076DC419,
+  0x706AF48F,
+  0xE963A535,
+  0x9E6495A3,
+  0x0EDB8832,
+  0x79DCB8A4,
+  0xE0D5E91E,
+  0x97D2D988,
+  0x09B64C2B,
+  0x7EB17CBD,
+  0xE7B82D07,
+  0x90BF1D91,
+  0x1DB71064,
+  0x6AB020F2,
+  0xF3B97148,
+  0x84BE41DE,
+  0x1ADAD47D,
+  0x6DDDE4EB,
+  0xF4D4B551,
+  0x83D385C7,
+  0x136C9856,
+  0x646BA8C0,
+  0xFD62F97A,
+  0x8A65C9EC,
+  0x14015C4F,
+  0x63066CD9,
+  0xFA0F3D63,
+  0x8D080DF5,
+  0x3B6E20C8,
+  0x4C69105E,
+  0xD56041E4,
+  0xA2677172,
+  0x3C03E4D1,
+  0x4B04D447,
+  0xD20D85FD,
+  0xA50AB56B,
+  0x35B5A8FA,
+  0x42B2986C,
+  0xDBBBC9D6,
+  0xACBCF940,
+  0x32D86CE3,
+  0x45DF5C75,
+  0xDCD60DCF,
+  0xABD13D59,
+  0x26D930AC,
+  0x51DE003A,
+  0xC8D75180,
+  0xBFD06116,
+  0x21B4F4B5,
+  0x56B3C423,
+  0xCFBA9599,
+  0xB8BDA50F,
+  0x2802B89E,
+  0x5F058808,
+  0xC60CD9B2,
+  0xB10BE924,
+  0x2F6F7C87,
+  0x58684C11,
+  0xC1611DAB,
+  0xB6662D3D,
+  0x76DC4190,
+  0x01DB7106,
+  0x98D220BC,
+  0xEFD5102A,
+  0x71B18589,
+  0x06B6B51F,
+  0x9FBFE4A5,
+  0xE8B8D433,
+  0x7807C9A2,
+  0x0F00F934,
+  0x9609A88E,
+  0xE10E9818,
+  0x7F6A0DBB,
+  0x086D3D2D,
+  0x91646C97,
+  0xE6635C01,
+  0x6B6B51F4,
+  0x1C6C6162,
+  0x856530D8,
+  0xF262004E,
+  0x6C0695ED,
+  0x1B01A57B,
+  0x8208F4C1,
+  0xF50FC457,
+  0x65B0D9C6,
+  0x12B7E950,
+  0x8BBEB8EA,
+  0xFCB9887C,
+  0x62DD1DDF,
+  0x15DA2D49,
+  0x8CD37CF3,
+  0xFBD44C65,
+  0x4DB26158,
+  0x3AB551CE,
+  0xA3BC0074,
+  0xD4BB30E2,
+  0x4ADFA541,
+  0x3DD895D7,
+  0xA4D1C46D,
+  0xD3D6F4FB,
+  0x4369E96A,
+  0x346ED9FC,
+  0xAD678846,
+  0xDA60B8D0,
+  0x44042D73,
+  0x33031DE5,
+  0xAA0A4C5F,
+  0xDD0D7CC9,
+  0x5005713C,
+  0x270241AA,
+  0xBE0B1010,
+  0xC90C2086,
+  0x5768B525,
+  0x206F85B3,
+  0xB966D409,
+  0xCE61E49F,
+  0x5EDEF90E,
+  0x29D9C998,
+  0xB0D09822,
+  0xC7D7A8B4,
+  0x59B33D17,
+  0x2EB40D81,
+  0xB7BD5C3B,
+  0xC0BA6CAD,
+  0xEDB88320,
+  0x9ABFB3B6,
+  0x03B6E20C,
+  0x74B1D29A,
+  0xEAD54739,
+  0x9DD277AF,
+  0x04DB2615,
+  0x73DC1683,
+  0xE3630B12,
+  0x94643B84,
+  0x0D6D6A3E,
+  0x7A6A5AA8,
+  0xE40ECF0B,
+  0x9309FF9D,
+  0x0A00AE27,
+  0x7D079EB1,
+  0xF00F9344,
+  0x8708A3D2,
+  0x1E01F268,
+  0x6906C2FE,
+  0xF762575D,
+  0x806567CB,
+  0x196C3671,
+  0x6E6B06E7,
+  0xFED41B76,
+  0x89D32BE0,
+  0x10DA7A5A,
+  0x67DD4ACC,
+  0xF9B9DF6F,
+  0x8EBEEFF9,
+  0x17B7BE43,
+  0x60B08ED5,
+  0xD6D6A3E8,
+  0xA1D1937E,
+  0x38D8C2C4,
+  0x4FDFF252,
+  0xD1BB67F1,
+  0xA6BC5767,
+  0x3FB506DD,
+  0x48B2364B,
+  0xD80D2BDA,
+  0xAF0A1B4C,
+  0x36034AF6,
+  0x41047A60,
+  0xDF60EFC3,
+  0xA867DF55,
+  0x316E8EEF,
+  0x4669BE79,
+  0xCB61B38C,
+  0xBC66831A,
+  0x256FD2A0,
+  0x5268E236,
+  0xCC0C7795,
+  0xBB0B4703,
+  0x220216B9,
+  0x5505262F,
+  0xC5BA3BBE,
+  0xB2BD0B28,
+  0x2BB45A92,
+  0x5CB36A04,
+  0xC2D7FFA7,
+  0xB5D0CF31,
+  0x2CD99E8B,
+  0x5BDEAE1D,
+  0x9B64C2B0,
+  0xEC63F226,
+  0x756AA39C,
+  0x026D930A,
+  0x9C0906A9,
+  0xEB0E363F,
+  0x72076785,
+  0x05005713,
+  0x95BF4A82,
+  0xE2B87A14,
+  0x7BB12BAE,
+  0x0CB61B38,
+  0x92D28E9B,
+  0xE5D5BE0D,
+  0x7CDCEFB7,
+  0x0BDBDF21,
+  0x86D3D2D4,
+  0xF1D4E242,
+  0x68DDB3F8,
+  0x1FDA836E,
+  0x81BE16CD,
+  0xF6B9265B,
+  0x6FB077E1,
+  0x18B74777,
+  0x88085AE6,
+  0xFF0F6A70,
+  0x66063BCA,
+  0x11010B5C,
+  0x8F659EFF,
+  0xF862AE69,
+  0x616BFFD3,
+  0x166CCF45,
+  0xA00AE278,
+  0xD70DD2EE,
+  0x4E048354,
+  0x3903B3C2,
+  0xA7672661,
+  0xD06016F7,
+  0x4969474D,
+  0x3E6E77DB,
+  0xAED16A4A,
+  0xD9D65ADC,
+  0x40DF0B66,
+  0x37D83BF0,
+  0xA9BCAE53,
+  0xDEBB9EC5,
+  0x47B2CF7F,
+  0x30B5FFE9,
+  0xBDBDF21C,
+  0xCABAC28A,
+  0x53B39330,
+  0x24B4A3A6,
+  0xBAD03605,
+  0xCDD70693,
+  0x54DE5729,
+  0x23D967BF,
+  0xB3667A2E,
+  0xC4614AB8,
+  0x5D681B02,
+  0x2A6F2B94,
+  0xB40BBE37,
+  0xC30C8EA1,
+  0x5A05DF1B,
+  0x2D02EF8D
+};

edk2-platforms/Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c

@@ -1,7 +1,7 @@
 /** @file
  *
- *  Static SMBIOS Table for the RaspberryPi platform
- *  Derived from EmulatorPkg package
+ *  Static SMBIOS Table for RK35xx based platforms
+ *  Derived from the quartz64_uefi, RaspberryPi and EmulatorPkg packages.
  *
  *  Note - Arm SBBR ver 1.2 required and recommended SMBIOS structures:
  *    BIOS Information (Type 0)
@@ -23,12 +23,13 @@
  *    Onboard Devices Extended Information (Type 41) - Recommended
  *    Redfish Host Interface (Type 42) - Required for platforms supporting Redfish Host Interface (not applicable to RPi)
  *
- *  Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>
+ *  Copyright (c) 2017-2021, Andrey Warkentin <andrey.warkentin@gmail.com>
  *  Copyright (c) 2013, Linaro.org
  *  Copyright (c) 2012, Apple Inc. All rights reserved.<BR>
  *  Copyright (c) Microsoft Corporation. All rights reserved.
  *  Copyright (c) 2020, ARM Limited. All rights reserved.
- *  Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
+ *  Copyright (c) 2021 Jared McNeill <jmcneill@invisible.ca>
+ *  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
  *
  *  SPDX-License-Identifier: BSD-2-Clause-Patent
  *
@@ -50,10 +51,40 @@
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UefiRuntimeServicesTableLib.h>
 #include <Library/PrintLib.h>
+#include <Library/CruLib.h>
 #include <Library/SdramLib.h>
-#define ASSET_TAG_STR_STORAGE_SIZE  33
+#include <Library/OtpLib.h>
+#include <Protocol/ArmScmiClockProtocol.h>
+#include "Crc32Table.h"
+
 #define SMB_IS_DIGIT(c)  (((c) >= '0') && ((c) <= '9'))
 
+STATIC UINT64 mMemorySize = 0;
+
+UINT32
+EFIAPI
+CalculateCrc32NoComp(
+  IN  UINT32                       Crc,
+  IN  VOID                         *Buffer,
+  IN  UINTN                        Length
+  )
+{
+  UINTN   Index;
+  UINT8   *Ptr;
+
+  ASSERT (Buffer != NULL);
+  ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+  //
+  // Compute CRC
+  //
+  for (Index = 0, Ptr = Buffer; Index < Length; Index++, Ptr++) {
+    Crc = (Crc >> 8) ^ mCrcTable[(UINT8) Crc ^ *Ptr];
+  }
+
+  return Crc;
+}
+
 /***********************************************************************
         SMBIOS data definition  TYPE0  BIOS Information
 ************************************************************************/
@@ -120,12 +151,12 @@ SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = {
   0,                       // SystemBiosMinorRelease
   0,                       // EmbeddedControllerFirmwareMajorRelease
   0,                       // EmbeddedControllerFirmwareMinorRelease
-  //{ (UINT16) ((FixedPcdGet32 (PcdFdSize) + FixedPcdGet32 (PcdFdtSize)) / 0x100000) }, // BiosSize (in MB since Bits 15:14 = 00b)
+  { (UINT16) (FixedPcdGet32 (PcdFdSize) / 0x100000) }, // BiosSize (in MB since Bits 15:14 = 00b)
 };
 
 CHAR8 mBiosVendor[128]  = "EDK2";
 CHAR8 mBiosVersion[128] = "EDK2-DEV";
-CHAR8 mBiosDate[12]     = "13/05/2022";
+CHAR8 mBiosDate[12]     = "00/00/0000";
 
 CHAR8 *mBIOSInfoType0Strings[] = {
   mBiosVendor,              // Vendor
@@ -151,6 +182,7 @@ SMBIOS_TABLE_TYPE1 mSysInfoType1 = {
 
 CHAR8 mSysInfoManufName[128];
 CHAR8 mSysInfoProductName[128];
+CHAR8 mSysInfoFamilyName[128];
 CHAR8 mSysInfoVersionName[128];
 CHAR8 mSysInfoSerial[sizeof (UINT64) * 2 + 1];
 CHAR8 mSysInfoSKU[sizeof (UINT64) * 2 + 1];
@@ -161,7 +193,7 @@ CHAR8 *mSysInfoType1Strings[] = {
   mSysInfoVersionName,
   mSysInfoSerial,
   mSysInfoSKU,
-  "Rockchip",
+  mSysInfoFamilyName,
   NULL
 };
 
@@ -284,7 +316,7 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = {
   0,                      // ThreadCount2;
 };
 
-CHAR8 mCpuName[128] = "RK3588";
+CHAR8 mCpuName[128] = "Unknown ARM CPU";
 
 CHAR8 *mProcessorInfoType4Strings[] = {
   "Socket",
@@ -307,13 +339,8 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1I = {
        //Enabled/Disabled   :1  (Enabled)
        //Operational Mode   :2  (Unknown)
        //Reserved           :6
-#if (RPI_MODEL == 4)
-  0x0030,                   // Maximum Size (RPi4: 48KB)
-  0x0030,                   // Install Size (RPi4: 48KB)
-#else
-  0x0010,                   // Maximum Size (RPi3: 16KB)
-  0x0010,                   // Install Size (RPi3: 16KB)
-#endif
+  0x0020,                   // Maximum Size (32KB)
+  0x0020,                   // Install Size (32KB)
   {                         // Supported SRAM Type
     0,  //Other             :1
     0,  //Unknown           :1
@@ -355,13 +382,8 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7_L1D = {
        //Enabled/Disabled   :1  (Enabled)
        //Operational Mode   :2  (WB)
        //Reserved           :6
-#if (RPI_MODEL == 4)
-  0x0020,                   // Maximum Size (RPi4: 32KB)
-  0x0020,                   // Install Size (RPi4: 32KB)
-#else
-  0x0010,                   // Maximum Size (RPi3: 16KB)
-  0x0010,                   // Install Size (RPi3: 16KB)
-#endif
+  0x0020,                   // Maximum Size (32KB)
+  0x0020,                   // Install Size (32KB)
   {                         // Supported SRAM Type
     0,  //Other             :1
     0,  //Unknown           :1
@@ -407,8 +429,8 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7_L2 = {
        //Enabled/Disabled   :1  (Enabled)
        //Operational Mode   :2  (WB)
        //Reserved           :6
-  0x0400,                   // Maximum Size (1MB)
-  0x0400,                   // Install Size (1MB)
+  0x0200,                   // Maximum Size (512KB)
+  0x0200,                   // Install Size (512KB)
   {                         // Supported SRAM Type
     0,  //Other             :1
     0,  //Unknown           :1
@@ -479,12 +501,14 @@ CHAR8 *mSysSlotInfoType9Strings[] = {
         SMBIOS data definition  TYPE 11  OEM Strings
 ************************************************************************/
 
+CHAR8 mOemInfoProductUrl[128];
+
 SMBIOS_TABLE_TYPE11 mOemStringsType11 = {
   { EFI_SMBIOS_TYPE_OEM_STRINGS, sizeof (SMBIOS_TABLE_TYPE11), 0 },
   1 // StringCount
 };
 CHAR8 *mOemStringsType11Strings[] = {
-  "https://github/tianocore/edk2-platforms",
+  mOemInfoProductUrl,
   NULL
 };
 
@@ -508,6 +532,8 @@ CHAR8 *mPhyMemArrayInfoType16Strings[] = {
 /***********************************************************************
         SMBIOS data definition  TYPE17  Memory Device Information
 ************************************************************************/
+CHAR8 mMemDevInfoVendor[128];
+
 SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = {
   { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 },
   0,                    // MemoryArrayHandle; // Should match SMBIOS_TABLE_TYPE16.Handle, initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()
@@ -575,7 +601,7 @@ SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = {
 };
 CHAR8 *mMemDevInfoType17Strings[] = {
   "SDRAM",
-  "Micron",
+  mMemDevInfoVendor,
   NULL
 };
 
@@ -608,6 +634,7 @@ CHAR8 *mBootInfoType32Strings[] = {
   NULL
 };
 
+
 /**
 
    Create SMBIOS record.
@@ -728,30 +755,22 @@ BIOSInfoUpdateSmbiosType0 (
   VOID
   )
 {
-  UINT32 EpochSeconds = 0;
-  EFI_TIME Time;
-  INTN   State = 0;
   INTN   i;
+  INTN   State = 0;
   INTN   Value[2];
   INTN   Year = TIME_BUILD_YEAR;
   INTN   Month = TIME_BUILD_MONTH;
   INTN   Day = TIME_BUILD_DAY;
 
-  // Populate the Firmware major and minor.
-    // The firmware revision is really an epoch time which we convert to a
-    // YY.MM major.minor. This is good enough for our purpose, where this
-    // revision is merely provided as a loose indicator of when the
-    // VideoCore firmware was generated.
-    EpochToEfiTime (EpochSeconds, &Time);
-    ASSERT (Time.Year >= 2000 && Time.Year <= 2255);
-    mBIOSInfoType0.EmbeddedControllerFirmwareMajorRelease = (UINT8)(Time.Year - 2000);
-    mBIOSInfoType0.EmbeddedControllerFirmwareMinorRelease = Time.Month;
+  mBIOSInfoType0.EmbeddedControllerFirmwareMajorRelease = 0;
+  mBIOSInfoType0.EmbeddedControllerFirmwareMinorRelease = 0;
+
   // mBiosVendor and mBiosVersion, which are referenced in mBIOSInfoType0Strings,
   // are left unchanged if the following calls fail.
   UnicodeStrToAsciiStrS ((CHAR16*)PcdGetPtr (PcdFirmwareVendor),
-    mBiosVendor, sizeof (mBiosVendor));
+                         mBiosVendor, sizeof (mBiosVendor));
   UnicodeStrToAsciiStrS ((CHAR16*)PcdGetPtr (PcdFirmwareVersionString),
-    mBiosVersion, sizeof (mBiosVersion));
+                         mBiosVersion, sizeof (mBiosVersion));
   ASSERT (Year >= 0 && Year <= 9999);
   ASSERT (Month >= 1 && Month <= 12);
   ASSERT (Day >= 1 && Day <= 31);
@@ -840,15 +859,32 @@ SysInfoUpdateSmbiosType1 (
   VOID
   )
 {
+  UINT8 OtpData[16];
+  UINT8 SerialLo[8];
+  UINT8 SerialHi[8];
   UINT32 BoardRevision = 0;
   UINT64 BoardSerial = 0;
+  UINTN Index;
 
-  AsciiStrCpyS (mSysInfoProductName, sizeof (mSysInfoProductName),"ROCK 5B");
-  AsciiStrCpyS (mSysInfoManufName, sizeof (mSysInfoManufName),"Radxa");
+  // Get serial number from OTP
+  OtpReadId (OtpData);
+  for (Index = 0; Index < 8; Index++) {
+    SerialLo[Index] = OtpData[Index * 2 + 1];
+    SerialHi[Index] = OtpData[Index * 2];
+  }
+  BoardSerial = CalculateCrc32NoComp (0, SerialLo, sizeof SerialLo);
+  BoardSerial |= (UINT64)CalculateCrc32NoComp (BoardSerial, SerialHi, sizeof SerialHi) << 32;
+
+  AsciiStrCpyS (mSysInfoProductName, sizeof (mSysInfoProductName), (CHAR8 *) PcdGetPtr(PcdPlatformName));
+  AsciiStrCpyS (mSysInfoFamilyName, sizeof (mSysInfoFamilyName), (CHAR8 *) PcdGetPtr(PcdFamilyName));
+  AsciiStrCpyS (mSysInfoManufName, sizeof (mSysInfoManufName), (CHAR8 *) PcdGetPtr(PcdPlatformVendorName));
   AsciiSPrint (mSysInfoVersionName, sizeof (mSysInfoVersionName), "%X", BoardRevision);
+
   I64ToHexString (mSysInfoSKU, sizeof (mSysInfoSKU), BoardRevision);
   I64ToHexString (mSysInfoSerial, sizeof (mSysInfoSerial), BoardSerial);
+
   DEBUG ((DEBUG_ERROR, "Board Serial Number: %a\n", mSysInfoSerial));
+
   mSysInfoType1.Uuid.Data1 = BoardRevision;
   mSysInfoType1.Uuid.Data2 = 0x0;
   mSysInfoType1.Uuid.Data3 = 0x0;
@@ -881,12 +917,48 @@ EnclosureInfoUpdateSmbiosType3 (
 {
   EFI_SMBIOS_HANDLE SmbiosHandle;
 
+  // SMBIOS referenced strings cannot be NULL. If no AssetTag is set, default to a blank space.
+  UnicodeStrToAsciiStrS(L" ", mChassisAssetTag, sizeof(mChassisAssetTag));
+
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mEnclosureInfoType3, mEnclosureInfoType3Strings, &SmbiosHandle);
 
   // Set Type2 ChassisHandle to point to the newly added Type3 handle
   mBoardInfoType2.ChassisHandle = (UINT16) SmbiosHandle;
 }
 
+
+STATIC UINT32
+ProcessorGetRate (
+  VOID
+  )
+{
+  EFI_STATUS Status;
+  SCMI_CLOCK_PROTOCOL *ClockProtocol;
+  EFI_GUID ClockProtocolGuid = ARM_SCMI_CLOCK_PROTOCOL_GUID;
+  UINT64 Rate;
+  UINT32 ClockId = 0;
+
+  // If we can't query SCMI, fallback to reading from CRU registers
+  //Rate = CruGetCoreClockRate ();
+
+  Rate = 1200;
+  
+  Status = gBS->LocateProtocol (
+                  &ClockProtocolGuid,
+                  NULL,
+                  (VOID**)&ClockProtocol
+                  );
+  if (EFI_ERROR (Status)) {
+    return (UINT32)Rate;
+  }
+
+  ClockProtocol->RateGet (ClockProtocol, ClockId, &Rate);
+
+  DEBUG ((DEBUG_INFO, "SCMI: SMBIOS reported rate %luHz\n", Rate));
+  
+  return (UINT32)Rate;
+}
+
 /***********************************************************************
         SMBIOS data update  TYPE4  Processor Information
 ************************************************************************/
@@ -895,9 +967,10 @@ ProcessorInfoUpdateSmbiosType4 (
   IN UINTN MaxCpus
   )
 {
-  //EFI_STATUS Status;
- // UINT32     Rate;
-  UINT64     *ProcessorId;
+  UINT32 Rate;
+  UINT64 *ProcessorId;
+  UINT16 CpuCode;
+  UINT8 CpuVersion;
 
   mProcessorInfoType4.CoreCount = (UINT8)MaxCpus;
   mProcessorInfoType4.CoreCount2 = (UINT8)MaxCpus;
@@ -905,8 +978,24 @@ ProcessorInfoUpdateSmbiosType4 (
   mProcessorInfoType4.EnabledCoreCount2 = (UINT8)MaxCpus;
   mProcessorInfoType4.ThreadCount = (UINT8)MaxCpus;
   mProcessorInfoType4.ThreadCount2 = (UINT8)MaxCpus;
-  mProcessorInfoType4.MaxSpeed = 2100;    /*2100 MHZ*/
-  mProcessorInfoType4.CurrentSpeed = 1800;/*1800 MHZ*/
+
+  Rate = ProcessorGetRate ();
+  mProcessorInfoType4.MaxSpeed = Rate / 1000000;
+  mProcessorInfoType4.CurrentSpeed = Rate / 1000000;
+
+  OtpReadCpuCode(&CpuCode);
+  OtpReadCpuVersion(&CpuVersion);
+  CpuCode = (CpuCode >> 8) | (CpuCode << 8);
+  
+  AsciiSPrint(mCpuName, sizeof(mCpuName), "Rockchip RK%04X", CpuCode);
+
+  if (CpuVersion & BIT3) {
+    switch (CpuCode) {
+      case 0x3588:
+        AsciiStrCatS(mCpuName, sizeof(mCpuName), "S");
+        break;
+    }
+  }
 
   ProcessorId = (UINT64 *)&(mProcessorInfoType4.ProcessorId);
   *ProcessorId = ArmReadMidr();
@@ -954,6 +1043,8 @@ OemStringsUpdateSmbiosType11 (
   VOID
   )
 {
+  AsciiStrCpyS (mOemInfoProductUrl, sizeof (mOemInfoProductUrl), (CHAR8 *) PcdGetPtr(PcdProductUrl));
+
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mOemStringsType11, mOemStringsType11Strings, NULL);
 }
 
@@ -966,8 +1057,6 @@ PhyMemArrayInfoUpdateSmbiosType16 (
   )
 {
   EFI_SMBIOS_HANDLE MemArraySmbiosHandle;
-  EFI_STATUS        Status = 0;
-  UINT32            InstalledMB = 0;
 
  //
  // Update memory size fields:
@@ -976,15 +1065,7 @@ PhyMemArrayInfoUpdateSmbiosType16 (
  //  - Type 17 VolatileSize in Bytes
  //
 
- // The minimum RAM size used on any Raspberry Pi model is 256 MB
-  mMemDevInfoType17.Size = 256;
-
-  //Status = mFwProtocol->GetModelInstalledMB (&InstalledMB);
-  if (Status != EFI_SUCCESS) {
-    DEBUG ((DEBUG_WARN, "Couldn't get the board memory size - defaulting to 256 MB: %r\n", Status));
-  } else {
-    mMemDevInfoType17.Size = InstalledMB; // Size in MB
-  }
+  mMemDevInfoType17.Size = mMemorySize / (1024 * 1024);
 
   mPhyMemArrayInfoType16.MaximumCapacity = mMemDevInfoType17.Size * 1024; // Size in KB
   mMemDevInfoType17.VolatileSize = MultU64x32 (mMemDevInfoType17.Size, 1024 * 1024);  // Size in Bytes
@@ -1006,6 +1087,8 @@ MemDevInfoUpdateSmbiosType17 (
   VOID
   )
 {
+  AsciiStrCpyS (mMemDevInfoVendor, sizeof (mMemDevInfoVendor), (CHAR8 *) PcdGetPtr(PcdMemoryVendorName));
+
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemDevInfoType17, mMemDevInfoType17Strings, NULL);
 }
 
@@ -1017,15 +1100,11 @@ MemArrMapInfoUpdateSmbiosType19 (
   VOID
   )
 {
-  //EFI_STATUS Status;
-  //UINT32 InstalledMB = 0;
-
   // Note: Type 19 addresses are expressed in KB, not bytes
-  // The memory layout used in all known Pi SoC's starts at 0
-  mMemArrMapInfoType19.StartingAddress = 0;
-  mMemArrMapInfoType19.EndingAddress = 1024 * 1024;
-  mMemArrMapInfoType19.EndingAddress = SdramGetMemorySize () / 1024;
-  mMemArrMapInfoType19.EndingAddress -= 1;
+  mMemArrMapInfoType19.StartingAddress = PcdGet64(PcdSystemMemoryBase) / 1024;
+
+  mMemArrMapInfoType19.EndingAddress = mMemArrMapInfoType19.StartingAddress +
+    mMemorySize / 1024 - 1;
 
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemArrMapInfoType19, mMemArrMapInfoType19Strings, NULL);
 }
@@ -1052,6 +1131,11 @@ PlatformSmbiosDriverEntryPoint (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
+
+  DEBUG ((DEBUG_INFO, "PlatformSmbiosDriverEntryPoint() called\n"));
+
+  mMemorySize = SdramGetMemorySize ();
+
   BIOSInfoUpdateSmbiosType0 ();
 
   SysInfoUpdateSmbiosType1 ();
@@ -1076,5 +1160,7 @@ PlatformSmbiosDriverEntryPoint (
 
   BootInfoUpdateSmbiosType32 ();
 
+  DEBUG ((DEBUG_INFO, "PlatformSmbiosDriverEntryPoint() returning\n"));
+
   return EFI_SUCCESS;
 }

edk2-platforms/Silicon/Rockchip/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf

@@ -1,8 +1,10 @@
+
 #/** @file
 #
-#  SMBIOS Table for the RaspberryPi platform
+#  SMBIOS Table for RK35xx platforms
 #
-#  Copyright (c) 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
+#  Copyright (c) 2021 Jared McNeill <jmcneill@invisible.ca>
+#  Copyright (c) 2017-2021 Andrei Warkentin <andrey.warkentin@gmail.com>
 #  Copyright (c) Microsoft Corporation. All rights reserved.
 #  Copyright (c) 2013 Linaro.org
 #  Copyright (c) 2020, ARM Limited. All rights reserved.
@@ -14,7 +16,7 @@
 [Defines]
   INF_VERSION                    = 0x0001001A
   BASE_NAME                      = PlatformSmbiosDxe
-  FILE_GUID                      = BAD0554E-22E9-4D83-9AFD-CC87727A1A45
+  FILE_GUID                      = 196E5BEB-983E-4B58-8292-BC310F6962DF
   MODULE_TYPE                    = DXE_DRIVER
   VERSION_STRING                 = 1.0
   ENTRY_POINT                    = PlatformSmbiosDriverEntryPoint
@@ -27,8 +29,8 @@
   MdeModulePkg/MdeModulePkg.dec
   ArmPlatformPkg/ArmPlatformPkg.dec
   ArmPkg/ArmPkg.dec
-  Platform/Rockchip/RK3588/RK3588.dec
   EmbeddedPkg/EmbeddedPkg.dec
+  Silicon/Rockchip/RockchipPkg.dec
 
 [LibraryClasses]
   ArmLib
@@ -41,25 +43,27 @@
   DebugLib
   PrintLib
   TimeBaseLib
+  CruLib
   SdramLib
+  OtpLib
 
 [Protocols]
   gEfiSmbiosProtocolGuid           # PROTOCOL SOMETIMES_CONSUMED
-#  gRaspberryPiFirmwareProtocolGuid ## CONSUMES
 
 [Guids]
-# gConfigDxeFormSetGuid
 
 [Depex]
   gEfiSmbiosProtocolGuid
-#  AND gRaspberryPiFirmwareProtocolGuid
 
 [Pcd]
   gArmTokenSpaceGuid.PcdFdBaseAddress
   gArmTokenSpaceGuid.PcdFdSize
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
+  gRockchipTokenSpaceGuid.PcdPlatformName
+  gRockchipTokenSpaceGuid.PcdPlatformVendorName
+  gRockchipTokenSpaceGuid.PcdProductUrl
+  gRockchipTokenSpaceGuid.PcdFamilyName
+  gRockchipTokenSpaceGuid.PcdMemoryVendorName
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
-#  gRaspberryPiTokenSpaceGuid.PcdFdtSize
-#  gRaspberryPiTokenSpaceGuid.PcdRamMoreThan3GB
-#  gRaspberryPiTokenSpaceGuid.PcdRamLimitTo3GB

edk2-platforms/Silicon/Rockchip/Include/Library/BmcConfigBootLib.h

@@ -1,25 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2017, Linaro Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#ifndef _BMC_CONFIG_BOOT_LIB_H_
-#define _BMC_CONFIG_BOOT_LIB_H_
-
-VOID
-EFIAPI
-RestoreBootOrder (
-  VOID
-  );
-
-VOID
-EFIAPI
-HandleBmcBootType (
-  VOID
-  );
-
-#endif

edk2-platforms/Silicon/Rockchip/Include/Library/OtpLib.h

@@ -0,0 +1,35 @@
+/** @file
+ *
+ *  Copyright (c) 2022, Jared McNeill <jmcneill@invisible.ca>
+ *  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ *  SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#ifndef OTPLIB_H__
+#define OTPLIB_H__
+
+VOID
+OtpRead (
+    IN UINT16 Offset,
+    IN UINT16 Length,
+    OUT UINT8 *Data
+    );
+
+VOID
+OtpReadCpuCode (
+    OUT UINT16 *CpuCode
+    );
+
+VOID
+OtpReadId (
+    OUT UINT8 Id[16]
+    );
+
+VOID
+OtpReadCpuVersion (
+    OUT UINT8 *Version
+    );
+
+#endif /* OTPLIB_H__ */

edk2-platforms/Silicon/Rockchip/Include/Library/RockchipPlatformLib.h

@@ -66,6 +66,12 @@ void
 EFIAPI
 Rk806SpiIomux(void);
 
+VOID
+EFIAPI
+Rk806Configure(
+  VOID
+  );
+
 void
 EFIAPI
 NorFspiIomux(void);

edk2-platforms/Silicon/Rockchip/Library/BmcConfigBootLib/BmcConfigBootLib.c

@@ -1,460 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2017, Linaro Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/IpmiCmdLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PrintLib.h>
-#include <Library/UefiBootManagerLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Guid/GlobalVariable.h>
-#include <Protocol/DevicePathToText.h>
-
-
-STATIC
-UINT16
-EFIAPI
-GetBBSTypeFromFileSysPath (
-  IN CHAR16                   *UsbPathTxt,
-  IN CHAR16                   *FileSysPathTxt,
-  IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
-  )
-{
-  EFI_DEVICE_PATH_PROTOCOL *Node;
-
-  if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
-    Node = FileSysPath;
-    while (!IsDevicePathEnd (Node)) {
-      if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
-          (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
-        return BBS_TYPE_CDROM;
-      }
-      Node = NextDevicePathNode (Node);
-    }
-  }
-
-  return BBS_TYPE_UNKNOWN;
-}
-
-STATIC
-UINT16
-EFIAPI
-GetBBSTypeFromUsbPath (
-  IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
-  )
-{
-  EFI_STATUS                        Status;
-  EFI_HANDLE                        *FileSystemHandles;
-  UINTN                             NumberFileSystemHandles;
-  UINTN                             Index;
-  EFI_DEVICE_PATH_PROTOCOL          *FileSysPath;
-  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL  *DevPathToText;
-  CHAR16                            *UsbPathTxt;
-  CHAR16                            *FileSysPathTxt;
-  UINT16                            Result;
-
-  Status = gBS->LocateProtocol (
-                  &gEfiDevicePathToTextProtocolGuid,
-                  NULL,
-                  (VOID **) &DevPathToText);
-  ASSERT_EFI_ERROR(Status);
-
-  Result = BBS_TYPE_UNKNOWN;
-  UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
-  if (UsbPathTxt == NULL) {
-    return Result;
-  }
-
-  Status = gBS->LocateHandleBuffer (
-                  ByProtocol,
-                  &gEfiSimpleFileSystemProtocolGuid,
-                  NULL,
-                  &NumberFileSystemHandles,
-                  &FileSystemHandles
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
-    FreePool (UsbPathTxt);
-    return BBS_TYPE_UNKNOWN;
-  }
-
-  for (Index = 0; Index < NumberFileSystemHandles; Index++) {
-    FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
-    FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
-
-    if (FileSysPathTxt == NULL) {
-      continue;
-    }
-
-    Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
-    FreePool (FileSysPathTxt);
-
-    if (Result != BBS_TYPE_UNKNOWN) {
-      break;
-    }
-  }
-
-  if (NumberFileSystemHandles != 0) {
-    FreePool (FileSystemHandles);
-  }
-
-  FreePool (UsbPathTxt);
-
-  return Result;
-}
-
-STATIC
-UINT16
-EFIAPI
-GetBBSTypeFromMessagingDevicePath (
-  IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
-  IN EFI_DEVICE_PATH_PROTOCOL *Node
-  )
-{
-  VENDOR_DEVICE_PATH       *Vendor;
-  UINT16                   Result;
-
-  Result = BBS_TYPE_UNKNOWN;
-
-  switch (DevicePathSubType (Node)) {
-  case MSG_MAC_ADDR_DP:
-    Result = BBS_TYPE_EMBEDDED_NETWORK;
-    break;
-
-  case MSG_USB_DP:
-    Result = GetBBSTypeFromUsbPath (DevicePath);
-    if (Result == BBS_TYPE_UNKNOWN) {
-      Result = BBS_TYPE_USB;
-    }
-    break;
-
-  case MSG_SATA_DP:
-    Result = BBS_TYPE_HARDDRIVE;
-    break;
-
-  case MSG_VENDOR_DP:
-    Vendor = (VENDOR_DEVICE_PATH *) (Node);
-    if (&Vendor->Guid != NULL) {
-      if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
-        Result = BBS_TYPE_HARDDRIVE;
-      }
-    }
-    break;
-
-  default:
-    Result = BBS_TYPE_UNKNOWN;
-    break;
-  }
-
-  return Result;
-}
-
-STATIC
-UINT16
-EFIAPI
-GetBBSTypeByDevicePath (
-  IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
-  )
-{
-  EFI_DEVICE_PATH_PROTOCOL *Node;
-  UINT16                   Result;
-
-  Result = BBS_TYPE_UNKNOWN;
-  if (DevicePath == NULL) {
-    return Result;
-  }
-
-  Node = DevicePath;
-  while (!IsDevicePathEnd (Node)) {
-    switch (DevicePathType (Node)) {
-    case MEDIA_DEVICE_PATH:
-      if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
-        Result = BBS_TYPE_CDROM;
-      }
-      break;
-
-    case MESSAGING_DEVICE_PATH:
-      Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
-      break;
-
-    default:
-      Result = BBS_TYPE_UNKNOWN;
-      break;
-    }
-
-    if (Result != BBS_TYPE_UNKNOWN) {
-      break;
-    }
-
-    Node = NextDevicePathNode (Node);
-  }
-
-  return Result;
-}
-
-STATIC
-EFI_STATUS
-EFIAPI
-GetBmcBootOptionsSetting (
-  OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
-  )
-{
-  EFI_STATUS   Status;
-
-  Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
-    return Status;
-  }
-
-  if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
-    return EFI_NOT_FOUND;
-  }
-
-  if (BmcBootOpt->Persistent) {
-    BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
-  } else {
-    BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
-  }
-
-  Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
-  }
-
-  return Status;
-}
-
-VOID
-EFIAPI
-RestoreBootOrder (
-  VOID
-  )
-{
-  EFI_STATUS                Status;
-  UINT16                    *BootOrder;
-  UINTN                     BootOrderSize;
-
-  GetVariable2 (
-    L"BootOrderBackup",
-    &gOemBootVariableGuid,
-    (VOID **) &BootOrder,
-    &BootOrderSize
-    );
-  if (BootOrder == NULL) {
-    return ;
-  }
-
-  Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
-
-  Status = gRT->SetVariable (
-                  L"BootOrder",
-                  &gEfiGlobalVariableGuid,
-                  EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS
-                  | EFI_VARIABLE_NON_VOLATILE,
-                  BootOrderSize,
-                  BootOrder
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
-  }
-
-  Status = gRT->SetVariable (
-                  L"BootOrderBackup",
-                  &gOemBootVariableGuid,
-                  EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
-                  0,
-                  NULL
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
-  }
-
-  FreePool (BootOrder);
-}
-
-
-STATIC
-VOID
-EFIAPI
-RestoreBootOrderOnReadyToBoot (
-  IN EFI_EVENT        Event,
-  IN VOID             *Context
-  )
-{
-  // restore BootOrder variable in normal condition.
-  RestoreBootOrder ();
-}
-
-STATIC
-VOID
-EFIAPI
-UpdateBootOrder (
-  IN UINT16  *NewOrder,
-  IN UINT16  *BootOrder,
-  IN UINTN   BootOrderSize
-  )
-{
-  EFI_STATUS  Status;
-  EFI_EVENT   Event;
-
-  Status = gRT->SetVariable (
-                  L"BootOrderBackup",
-                  &gOemBootVariableGuid,
-                  EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
-                  BootOrderSize,
-                  BootOrder
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Set BootOrderBackup Variable:%r!\n", Status));
-    return;
-  }
-
-  Status = gRT->SetVariable (
-                  L"BootOrder",
-                  &gEfiGlobalVariableGuid,
-                  EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS
-                  | EFI_VARIABLE_NON_VOLATILE,
-                  BootOrderSize,
-                  NewOrder
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Set BootOrder Variable:%r!\n", Status));
-    return;
-  }
-
-  // Register notify function to restore BootOrder variable on ReadyToBoot Event.
-  Status = gBS->CreateEventEx (
-                  EVT_NOTIFY_SIGNAL,
-                  TPL_CALLBACK,
-                  RestoreBootOrderOnReadyToBoot,
-                  NULL,
-                  &gEfiEventReadyToBootGuid,
-                  &Event
-                  );
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
-  }
-}
-
-STATIC
-VOID
-EFIAPI
-SetBootOrder (
-  IN UINT16 BootType
-  )
-{
-  EFI_STATUS                   Status;
-  UINT16                       *NewOrder;
-  UINT16                       *RemainBoots;
-  UINT16                       *BootOrder;
-  UINTN                        BootOrderSize;
-  EFI_BOOT_MANAGER_LOAD_OPTION Option;
-  CHAR16                       OptionName[sizeof ("Boot####")];
-  UINTN                        Index;
-  UINTN                        SelectCnt;
-  UINTN                        RemainCnt;
-
-  GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
-  if (BootOrder == NULL) {
-    return ;
-  }
-
-  NewOrder = AllocatePool (BootOrderSize);
-  RemainBoots = AllocatePool (BootOrderSize);
-  if ((NewOrder == NULL) || (RemainBoots == NULL)) {
-    DEBUG ((DEBUG_ERROR, "Out of resources."));
-    goto Exit;
-  }
-
-  SelectCnt = 0;
-  RemainCnt = 0;
-
-  for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
-    UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
-    Status = EfiBootManagerVariableToLoadOption (OptionName, &Option);
-    if (EFI_ERROR (Status)) {
-      DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
-      continue;
-    }
-
-    if (GetBBSTypeByDevicePath (Option.FilePath) == BootType) {
-      NewOrder[SelectCnt++] = BootOrder[Index];
-    } else {
-      RemainBoots[RemainCnt++] = BootOrder[Index];
-    }
-  }
-
-  if (SelectCnt != 0) {
-    // append RemainBoots to NewOrder
-    for (Index = 0; Index < RemainCnt; Index++) {
-      NewOrder[SelectCnt + Index] = RemainBoots[Index];
-    }
-
-    if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
-      UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
-    }
-  }
-
-Exit:
-  FreePool (BootOrder);
-  if (NewOrder != NULL) {
-    FreePool (NewOrder);
-  }
-  if (RemainBoots != NULL) {
-    FreePool (RemainBoots);
-  }
-}
-
-VOID
-EFIAPI
-HandleBmcBootType (
-  VOID
-  )
-{
-  EFI_STATUS                Status;
-  IPMI_GET_BOOT_OPTION      BmcBootOpt;
-  UINT16                    BootType;
-
-  Status = GetBmcBootOptionsSetting (&BmcBootOpt);
-  if (EFI_ERROR (Status)) {
-    return;
-  }
-
-  Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
-
-  switch (BmcBootOpt.BootDeviceSelector) {
-  case ForcePxe:
-    BootType = BBS_TYPE_EMBEDDED_NETWORK;
-    break;
-
-  case ForcePrimaryRemovableMedia:
-    BootType = BBS_TYPE_USB;
-    break;
-
-  case ForceDefaultHardDisk:
-    BootType = BBS_TYPE_HARDDRIVE;
-    break;
-
-  case ForceDefaultCD:
-    BootType = BBS_TYPE_CDROM;
-    break;
-
-  default:
-    return;
-  }
-
-  SetBootOrder (BootType);
-}
-

edk2-platforms/Silicon/Rockchip/Library/BmcConfigBootLib/BmcConfigBootLib.inf

@@ -1,46 +0,0 @@
-#/** @file
-#
-#    Copyright (c) 2015, Hisilicon Limited. All rights reserved.
-#    Copyright (c) 2015, Linaro Limited. All rights reserved.
-#
-#    SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x0001001A
-  BASE_NAME                      = BmcConfigBootLib
-  FILE_GUID                      = 87150b08-3177-11ec-95b4-f42a7dcb925d
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = BmcConfigBootLib
-
-[Sources.common]
-  BmcConfigBootLib.c
-
-[Packages]
-  MdeModulePkg/MdeModulePkg.dec
-  MdePkg/MdePkg.dec
-  Silicon/Rockchip/RockchipNonOsi.dec
-  Silicon/Rockchip/RockchipPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  DevicePathLib
-  IpmiCmdLib
-  PcdLib
-  PrintLib
-  UefiBootManagerLib
-
-[Guids]
-  gEfiEventReadyToBootGuid
-  gOemBootVariableGuid
-
-[Protocols]
-  gEfiDevicePathToTextProtocolGuid              ## CONSUMES
-  gEfiSimpleFileSystemProtocolGuid              ## CONSUMES
-
-[Depex]
-  gEfiDevicePathToTextProtocolGuid

edk2-platforms/Silicon/Rockchip/Library/PlatformBootManagerLib/PlatformBm.h

@@ -1,16 +1,16 @@
 /** @file
   Head file for BDS Platform specific code
 
-  Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
-  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-  Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+  Copyright (C) 2015-2016, Red Hat, Inc.
+  Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#ifndef _PLATFORM_BM_H_
-#define _PLATFORM_BM_H_
+#ifndef PLATFORM_BM_H_
+#define PLATFORM_BM_H_
 
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
@@ -21,5 +21,33 @@
 #include <Library/UefiLib.h>
 #include <Library/UefiRuntimeServicesTableLib.h>
 
+/**
+  Use SystemTable Conout to stop video based Simple Text Out consoles from
+  going to the video device. Put up LogoFile on every video device that is a
+  console.
 
-#endif // _PLATFORM_BM_H_
+  @param[in]  LogoFile   File name of logo to display on the center of the
+                         screen.
+
+  @retval EFI_SUCCESS     ConsoleControl has been flipped to graphics and logo
+                          displayed.
+  @retval EFI_UNSUPPORTED Logo not found
+**/
+EFI_STATUS
+EnableQuietBoot (
+  IN  EFI_GUID  *LogoFile
+  );
+
+/**
+  Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+  Simple Text Out screens will now be synced up with all non video output
+  devices
+
+  @retval EFI_SUCCESS     UGA devices are back in text mode and synced up.
+**/
+EFI_STATUS
+DisableQuietBoot (
+  VOID
+  );
+
+#endif // PLATFORM_BM_H_

edk2-platforms/Silicon/Rockchip/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf

@@ -1,18 +1,19 @@
 ## @file
 #  Implementation for PlatformBootManagerLib library class interfaces.
 #
-#  Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
-#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#  Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+#  Copyright (C) 2015-2016, Red Hat, Inc.
+#  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
 
 [Defines]
-  INF_VERSION                    = 0x0001001A
+  INF_VERSION                    = 0x00010005
   BASE_NAME                      = PlatformBootManagerLib
-  FILE_GUID                      = 7cee5710-3177-11ec-95b4-f42a7dcb925d
+  FILE_GUID                      = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
   MODULE_TYPE                    = DXE_DRIVER
   VERSION_STRING                 = 1.0
   LIBRARY_CLASS                  = PlatformBootManagerLib|DXE_DRIVER
@@ -25,48 +26,72 @@
 
 [Sources]
   PlatformBm.c
+  PlatformBm.h
 
 [Packages]
+  EmbeddedPkg/EmbeddedPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
-  Silicon/Rockchip/RockchipNonOsi.dec
+  ShellPkg/ShellPkg.dec
   Silicon/Rockchip/RockchipPkg.dec
+  SimpleInit.dec
 
 [LibraryClasses]
   BaseLib
   BaseMemoryLib
   BootLogoLib
-  BmcConfigBootLib
+  CapsuleLib
   DebugLib
   DevicePathLib
   DxeServicesLib
-  IpmiCmdLib
+  HobLib
   MemoryAllocationLib
   PcdLib
   PrintLib
-  TimerLib
   UefiBootManagerLib
   UefiBootServicesTableLib
   UefiLib
+  UefiRuntimeServicesTableLib
+
+[FeaturePcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
 
 [FixedPcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
-  gRockchipTokenSpaceGuid.PcdShellFile
 
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy
 
 [Guids]
+  gBootDiscoveryPolicyMgrFormsetGuid
+  gEdkiiNonDiscoverableEhciDeviceGuid
+  gEdkiiNonDiscoverableUhciDeviceGuid
+  gEdkiiNonDiscoverableXhciDeviceGuid
+  gEfiBootManagerPolicyNetworkGuid
+  gEfiBootManagerPolicyConnectAllGuid
+  gEfiFileInfoGuid
+  gEfiFileSystemInfoGuid
+  gEfiFileSystemVolumeLabelInfoIdGuid
   gEfiEndOfDxeEventGroupGuid
   gEfiTtyTermGuid
-  gOemConfigGuid
+  gUefiShellFileGuid
+  gSimpleInitFileGuid
+  gMaskromFileGuid
 
 [Protocols]
-  gEfiGenericMemTestProtocolGuid
+  gEdkiiNonDiscoverableDeviceProtocolGuid
+  gEfiBootManagerPolicyProtocolGuid
+  gEfiDevicePathProtocolGuid
+  gEfiGraphicsOutputProtocolGuid
   gEfiLoadedImageProtocolGuid
+  gEfiPciRootBridgeIoProtocolGuid
+  gEfiSimpleFileSystemProtocolGuid
   gEsrtManagementProtocolGuid
-  gPlatformSasNotifyProtocolGuid
+  gPlatformBootManagerProtocolGuid

edk2-platforms/Silicon/Rockchip/Library/ResetSystemLib/ResetSystemLib.inf

@@ -22,7 +22,7 @@
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
+  Silicon/Rockchip/RockchipPkg.dec
 
 [LibraryClasses]
   ArmSmcLib

edk2-platforms/Silicon/Rockchip/Library/RkMtlLib/RkMtlLib.inf

@@ -20,7 +20,7 @@
   ArmPkg/ArmPkg.dec
   ArmPlatformPkg/ArmPlatformPkg.dec
   MdePkg/MdePkg.dec
-  Platform/Radxa/ROCK5B/ROCK5B.dec
+  Silicon/Rockchip/RockchipPkg.dec
 
 [LibraryClasses]
   ArmLib
@@ -30,6 +30,6 @@
   UefiBootServicesTableLib
 
 [FixedPcd.common]
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxBase
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSize
-  gROCK5BTokenSpaceGuid.PcdRkMtlMailBoxSmcId
+  gRockchipTokenSpaceGuid.PcdRkMtlMailBoxBase
+  gRockchipTokenSpaceGuid.PcdRkMtlMailBoxSize
+  gRockchipTokenSpaceGuid.PcdRkMtlMailBoxSmcId

edk2-platforms/Silicon/Rockchip/RK3588/AcpiTables/Cpu.asl

@@ -0,0 +1,94 @@
+/** @file
+ *
+ *  RK3588 CPU devices.
+ *
+ *  Copyright (c) 2020, Pete Batard <pete@akeo.ie>
+ *  Copyright (c) 2018-2020, Andrey Warkentin <andrey.warkentin@gmail.com>
+ *  Copyright (c) Microsoft Corporation. All rights reserved.
+ *  Copyright (c) 2021, ARM Limited. All rights reserved.
+ *
+ *  SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include "AcpiTables.h"
+
+Device (CPU0)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x0)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU1)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x1)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU2)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x2)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU3)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x3)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU4)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x4)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU5)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x5)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU6)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x6)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}
+
+Device (CPU7)
+{
+  Name (_HID, "ACPI0007")
+  Name (_UID, 0x7)
+  Method (_STA)
+  {
+    Return (0xf)
+  }
+}

edk2-platforms/Silicon/Rockchip/RK3588/AcpiTables/Usb3Host0.asl

@@ -0,0 +1,23 @@
+/** @file
+*  DWC3 XHCI controller #0 in host mode.
+*
+*  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "AcpiTables.h"
+
+Device (XHC0) {
+    Name (_HID, "PNP0D10")
+    Name (_UID, Zero)
+    Name (_CCA, Zero)
+
+    Method (_CRS, 0x0, Serialized) {
+        Name (RBUF, ResourceTemplate() {
+            Memory32Fixed (ReadWrite, 0xfc000000, 0x400000)
+            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 252 }
+        })
+        Return (RBUF)
+    }   
+}

edk2-platforms/Silicon/Rockchip/RK3588/AcpiTables/Usb3Host1.asl

@@ -0,0 +1,23 @@
+/** @file
+*  DWC3 XHCI controller #1 in host mode. (only exposed on full RK3588)
+*
+*  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "AcpiTables.h"
+
+Device (XHC1) {
+    Name (_HID, "PNP0D10")
+    Name (_UID, One)
+    Name (_CCA, Zero)
+
+    Method (_CRS, 0x0, Serialized) {
+        Name (RBUF, ResourceTemplate() {
+            Memory32Fixed (ReadWrite, 0xfc400000, 0x400000)
+            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 253 }
+        })
+        Return (RBUF)
+    }   
+}

edk2-platforms/Silicon/Rockchip/RK3588/AcpiTables/Usb3Host2.asl

@@ -0,0 +1,26 @@
+/** @file
+*  DWC3 XHCI controller #2 in host mode.
+*
+*  Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "AcpiTables.h"
+
+// This only supports USB 3.0 devices.
+// USB2 DP / DM are connected to one of the EHCI controllers instead (EHC1 usually).
+
+Device (XHC2) {
+    Name (_HID, "PNP0D10")
+    Name (_UID, 2)
+    Name (_CCA, Zero)
+
+    Method (_CRS, 0x0, Serialized) {
+        Name (RBUF, ResourceTemplate() {
+            Memory32Fixed (ReadWrite, 0xfcd00000, 0x400000)
+            Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 254 }
+        })
+        Return (RBUF)
+    }   
+}